{"title":"大型电子电路符号分析的层次技术","authors":"S. Jou, Mei-Fang Perng, C. Su, C. K. Wang","doi":"10.1109/ISCAS.1994.408745","DOIUrl":null,"url":null,"abstract":"A hierarchical symbolic analyzer (SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced.<<ETX>>","PeriodicalId":140999,"journal":{"name":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","volume":"44 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Hierarchical techniques for symbolic analysis of large electronic circuits\",\"authors\":\"S. Jou, Mei-Fang Perng, C. Su, C. K. Wang\",\"doi\":\"10.1109/ISCAS.1994.408745\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A hierarchical symbolic analyzer (SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced.<<ETX>>\",\"PeriodicalId\":140999,\"journal\":{\"name\":\"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94\",\"volume\":\"44 2\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.1994.408745\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.1994.408745","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hierarchical techniques for symbolic analysis of large electronic circuits
A hierarchical symbolic analyzer (SAGA2) for the analysis of electronic circuits is presented. SAGA2 analyzes lumped, linear, or linearized (small-signal) circuits in the S- and Z-domain. For large circuits, a hierarchical two-port method is used that is two to three order faster than that without using the hierarchical method. Also, the memory used is dramatically reduced.<>