3V CMOS 400mW 14b 1.4GS/s DAC多载波应用

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519) Pub Date : 2004-09-13 DOI:10.1109/ISSCC.2004.1332743

Bernd Schafferer, R. Adams

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引用次数: 105

摘要

本文提出了一种未经校准的0.18 /spl mu/m CMOS 14位1.4 GS/s DAC，具有LVDS接口，在260 MHz满频音下实现67 dB SFDR，在470 MHz中心双载波输出时实现70 dB ACLR。该IC的核心功耗为200mw。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 3V CMOS 400mW 14b 1.4GS/s DAC for multi-carrier applications

This paper presents an uncalibrated 0.18 /spl mu/m CMOS 14 bit 1.4 GS/s DAC, with an LVDS interface, which achieves 67 dB SFDR for a 260 MHz full-scale tone and 70 dB ACLR for a two-carrier output, centered at 470 MHz. The IC dissipates a core power of 200 mW.

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来源期刊

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

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