采用0.18µm CMOS技术有源电阻的超宽带LNA设计

2015 Communication, Control and Intelligent Systems (CCIS) Pub Date : 2015-11-01 DOI:10.1109/CCINTELS.2015.7437947

S. Nigam, P. C. Sau

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引用次数: 2

摘要

所提出的LNA设计采用共门拓扑作为放大部分。采用了降噪技术，特别强调了有源电阻的使用，从而使总体噪声系数降到最低，提高了增益。采用0.18μm工艺在ADS工具上进行了仿真。供电1.8V。实现的最大增益为14.774dB。在整个带宽上实现的噪声系数为1dB至1.6 dB。实现的带宽为3-9GHz。

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Design of UWB LNA using active resistors in 0.18µm CMOS technology

The proposed design of LNA uses common gate topology as an amplifying section. Noise cancelling technique is used and special emphasis is laid on the use of active resistors so that overall Noise figure is minimized and gain is enhanced. Simulation is done on ADS tool using 0.18μm technology. Power supply provided is 1.8V. Maximum gain achieved is 14.774dB. Noise figure achieved is 1dB to 1.6 dB over entire bandwidth. Bandwidth achieved is 3-9GHz.

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来源期刊

2015 Communication, Control and Intelligent Systems (CCIS)

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