{"title":"采用变压器匹配技术的低功耗3-5 ghz CMOS超宽带LNA","authors":"Dong-Hun Shin, Jaejin Park, C. Yue","doi":"10.1109/ASSCC.2007.4425740","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a 3-5-GHz CMOS ultra-wideband (UWB) Iow-noise amplifier (LNA) utilizing an on-chip transformer to achieve low-power operation and to realize a compact input matching network. Detailed analyses of the input match, voltage gain, and noise figure of the LNA are provided. Implemented in 0.13-mum CMOS, the LNA achieves a maximum power gain of 16.2 dB, an input return loss of greater than 11.0 dB, and a minimum noise figure of 2.8 dB for the 3-5-GHz UWB while consuming only 6.7 mW from a 1.2-V supply. The active area of the fabricated CMOS UWB LNA is 0.32 mm2.","PeriodicalId":186095,"journal":{"name":"2007 IEEE Asian Solid-State Circuits Conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"40","resultStr":"{\"title\":\"A low-power, 3-5-GHz CMOS UWB LNA using transformer matching technique\",\"authors\":\"Dong-Hun Shin, Jaejin Park, C. Yue\",\"doi\":\"10.1109/ASSCC.2007.4425740\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of a 3-5-GHz CMOS ultra-wideband (UWB) Iow-noise amplifier (LNA) utilizing an on-chip transformer to achieve low-power operation and to realize a compact input matching network. Detailed analyses of the input match, voltage gain, and noise figure of the LNA are provided. Implemented in 0.13-mum CMOS, the LNA achieves a maximum power gain of 16.2 dB, an input return loss of greater than 11.0 dB, and a minimum noise figure of 2.8 dB for the 3-5-GHz UWB while consuming only 6.7 mW from a 1.2-V supply. The active area of the fabricated CMOS UWB LNA is 0.32 mm2.\",\"PeriodicalId\":186095,\"journal\":{\"name\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"40\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2007.4425740\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2007.4425740","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-power, 3-5-GHz CMOS UWB LNA using transformer matching technique
This paper presents the design of a 3-5-GHz CMOS ultra-wideband (UWB) Iow-noise amplifier (LNA) utilizing an on-chip transformer to achieve low-power operation and to realize a compact input matching network. Detailed analyses of the input match, voltage gain, and noise figure of the LNA are provided. Implemented in 0.13-mum CMOS, the LNA achieves a maximum power gain of 16.2 dB, an input return loss of greater than 11.0 dB, and a minimum noise figure of 2.8 dB for the 3-5-GHz UWB while consuming only 6.7 mW from a 1.2-V supply. The active area of the fabricated CMOS UWB LNA is 0.32 mm2.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
