低插入损耗的dc - 6ghz 7位数字衰减器

H. Xiao, Jianquan Hu, Kaixue Ma
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引用次数: 1

摘要

本文提出了一种采用E/ d模式GaAs伪晶高电子迁移率晶体管(pHEMT)工艺制作的dc - 6ghz低插入损耗7位数字衰减器。设计的数字衰减器采用简化的t型衰减器来减少开关晶体管的数量,从而达到低插入损耗的目的。测量结果表明,所设计的数字衰减器在直流至6 ghz频率范围内,衰减范围为31.75 db,分辨率为0.25 db,插入损耗小于2.3 db, RMS衰减误差小于0.4 db,输入/输出回波损耗小于-10 db。同时,所设计的数字衰减器芯片面积紧凑,为2.35 mm × 0.9 mm ×0.1-mm。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A DC-6 GHz 7-Bit Digital Attenuator with Low Insertion Loss
This paper presents a dc to 6-GHz 7-bit digital attenuator with low insertion loss fabricated using E/D-mode GaAs pseudomorphic high electron-mobility transistor (pHEMT) process. By using the simplified T-attenuator to reduce the number of switch transistors, the designed digital attenuator achieves low insertion loss. Measurement results indicate that the designed digital attenuator achieves a 31.75-dB attenuation range with 0.25-dB resolution, smaller than 2.3-dB insertion loss, and less than 0.4-dB RMS attenuation error with better than -10-dB input/output return loss in the frequency range from dc to 6-GHz. Meanwhile, the designed digital attenuator has a compact chip area of 2.35-mm × 0.9-mm ×0.1-mm.
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