{"title":"能量收集放大器:低电压,超低电流,轨对轨输入输出,高速","authors":"Ali Far","doi":"10.1109/ROPEC.2016.7830520","DOIUrl":null,"url":null,"abstract":"An ultra low current and low voltage rail-to-rail input-output class AB amplifier is presented that is based on standard 0.18 micron digital CMOS. Operating under the subthreshold region, the amplifier is capable of running at high speeds, with a supply voltage (V<inf>DD</inf>) as low as ∼ 0.6V. The main contributions of this work are: First, a primarily current-mode rail-to-rail output stage is presented that employs Minimum Current Selectors (MCS) which monitor the sink-source currents of the output buffer transistors. Concurrently, Current Feedback Amplifiers (CFA) composed of Inverting Current Mirrors (ICM) regulate the minimum stand-by currents for either the non-sinking or non-sourcing output transistors, while allowing maximum currents to run through the sinking or sourcing transistors. As such, the output stage, in its basic configuration, can deliver a wide dynamic range at high speeds with V<inf>DD</inf> as low as ∼ V<inf>GS</inf>+2V<inf>DS</inf>. Second, a Floating Current Source (FCS) is utilized in the main amplifier that can also operate with V<inf>DD</inf> as low as ∼ V<inf>GS</inf>+2V<inf>DS</inf>. Montecarlo (MC) and worst case (WC) simulation show the following specifications are achievable: V<inf>DD</inf> minimum ∼ 0.6v; I<inf>DD</inf> ∼ 330nA; Input range rail-to-rail; offset voltage ∼ 6mV; Output range ∼ 25mV from the rails; open loop gain (Av) ∼ 78dB with unity gain frequency (fu) ∼ 1MHz and phase margin (PM) ∼ 40 degrees; power supply rejection ratio (PSRR) ∼ −83dB; common mode rejection ration (CMRR) ∼ −98dB; Slew rate (SR) ∼ 2V/us; Settling time (ts) ∼ 3uS to ∼ 2mV; rail-to-rail output voltage swing with R<inf>L</inf> ∼ 5K ohms, and size ∼ 120um/side.","PeriodicalId":166098,"journal":{"name":"2016 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Amplifier for energy harvesting: Low voltage, ultra low current, rail-to-rail input-output, high speed\",\"authors\":\"Ali Far\",\"doi\":\"10.1109/ROPEC.2016.7830520\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An ultra low current and low voltage rail-to-rail input-output class AB amplifier is presented that is based on standard 0.18 micron digital CMOS. Operating under the subthreshold region, the amplifier is capable of running at high speeds, with a supply voltage (V<inf>DD</inf>) as low as ∼ 0.6V. The main contributions of this work are: First, a primarily current-mode rail-to-rail output stage is presented that employs Minimum Current Selectors (MCS) which monitor the sink-source currents of the output buffer transistors. Concurrently, Current Feedback Amplifiers (CFA) composed of Inverting Current Mirrors (ICM) regulate the minimum stand-by currents for either the non-sinking or non-sourcing output transistors, while allowing maximum currents to run through the sinking or sourcing transistors. As such, the output stage, in its basic configuration, can deliver a wide dynamic range at high speeds with V<inf>DD</inf> as low as ∼ V<inf>GS</inf>+2V<inf>DS</inf>. Second, a Floating Current Source (FCS) is utilized in the main amplifier that can also operate with V<inf>DD</inf> as low as ∼ V<inf>GS</inf>+2V<inf>DS</inf>. Montecarlo (MC) and worst case (WC) simulation show the following specifications are achievable: V<inf>DD</inf> minimum ∼ 0.6v; I<inf>DD</inf> ∼ 330nA; Input range rail-to-rail; offset voltage ∼ 6mV; Output range ∼ 25mV from the rails; open loop gain (Av) ∼ 78dB with unity gain frequency (fu) ∼ 1MHz and phase margin (PM) ∼ 40 degrees; power supply rejection ratio (PSRR) ∼ −83dB; common mode rejection ration (CMRR) ∼ −98dB; Slew rate (SR) ∼ 2V/us; Settling time (ts) ∼ 3uS to ∼ 2mV; rail-to-rail output voltage swing with R<inf>L</inf> ∼ 5K ohms, and size ∼ 120um/side.\",\"PeriodicalId\":166098,\"journal\":{\"name\":\"2016 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)\",\"volume\":\"74 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ROPEC.2016.7830520\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ROPEC.2016.7830520","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Amplifier for energy harvesting: Low voltage, ultra low current, rail-to-rail input-output, high speed
An ultra low current and low voltage rail-to-rail input-output class AB amplifier is presented that is based on standard 0.18 micron digital CMOS. Operating under the subthreshold region, the amplifier is capable of running at high speeds, with a supply voltage (VDD) as low as ∼ 0.6V. The main contributions of this work are: First, a primarily current-mode rail-to-rail output stage is presented that employs Minimum Current Selectors (MCS) which monitor the sink-source currents of the output buffer transistors. Concurrently, Current Feedback Amplifiers (CFA) composed of Inverting Current Mirrors (ICM) regulate the minimum stand-by currents for either the non-sinking or non-sourcing output transistors, while allowing maximum currents to run through the sinking or sourcing transistors. As such, the output stage, in its basic configuration, can deliver a wide dynamic range at high speeds with VDD as low as ∼ VGS+2VDS. Second, a Floating Current Source (FCS) is utilized in the main amplifier that can also operate with VDD as low as ∼ VGS+2VDS. Montecarlo (MC) and worst case (WC) simulation show the following specifications are achievable: VDD minimum ∼ 0.6v; IDD ∼ 330nA; Input range rail-to-rail; offset voltage ∼ 6mV; Output range ∼ 25mV from the rails; open loop gain (Av) ∼ 78dB with unity gain frequency (fu) ∼ 1MHz and phase margin (PM) ∼ 40 degrees; power supply rejection ratio (PSRR) ∼ −83dB; common mode rejection ration (CMRR) ∼ −98dB; Slew rate (SR) ∼ 2V/us; Settling time (ts) ∼ 3uS to ∼ 2mV; rail-to-rail output voltage swing with RL ∼ 5K ohms, and size ∼ 120um/side.