An efficient and robust implementation of QDI datapath components

Quasi-Delay insensitive (QDI) circuits are the most robust and practical circuits that can be built and are resilient to process, temperature and voltage variations. However, QDI circuits suffer from high area overhead due to C-elements, used to prevent timing violation from internal unstable signals. A general optimization scheme to synthesize any Boolean function into our QDI model is proposed and illustrated. The experimental results in FPGAs indicate significant cost reduction over Balsa original design [5–7].