CMOS Front-end Integrated Circuits with Antenna for Dual-Conversion Receiver Applications

The proposed integrated CMOS front-end chip design, intended for use in dual conversion radio frequency receiver front-end, has been implemented in tsmc 0.18um CMOS processing. The dual conversion receiver front-end design consists of differential low noise amplifier (LNA), the 6th-order bandpass Gm-C loop filter, gilbert cell double balance mixer and cross-coupled LC-Tank voltage-controlled oscillator (VCO). A novel approach with double balance gilbert cell mixer with passive balun instead of the 6th-order Gm–C bandpass loop filter circuit used in differential low noise amplifier can promote optimized conversion gain, input P1dB, and noise figure (NF) on wafer testing. The proposed antenna applying for dual conversion receiver front-end application is presented and enhance performance in this article design. Experimental results of the RF integrated dual conversion receiver front-end exhibit radiation pattern with the proposed 5.725GHz to 5.825 GHz antenna at anechoic chamber room.