MISS隧道二极管:无电容4F/sup /存储单元，功率低于0.1 /spl mu/m

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104) Pub Date : 2000-06-13 DOI:10.1109/VLSIT.2000.852756

H. Matsuoka, T. Sakata, S. Kimura

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引用次数: 0

摘要

为了开发低于0.1 /spl mu/m时代的无电容4F/sup /内存单元(F: DRAM半间距)，我们提出使用由金属/绝缘体/p型Si/n型Si组成的简单结构的MISS隧道二极管。我们通过对其输运性质的广泛研究，首次证明了其可行性。

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MISS tunnel diode: a capacitorless 4F/sup 2/ memory cell for sub-0.1 /spl mu/m era

To develop a capacitorless 4F/sup 2/ memory cell (F: DRAM half pitch) for the sub-0.1 /spl mu/m era, we propose using the MISS tunnel diode, having a simple structure consisting of metal/insulator/p-type Si/n-type Si. We have demonstrated its feasibility for the first time by extensively studying its transport properties.

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2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)

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