一种基于FPGA的多项式乘法方法

Xiaoyang Xiao, Wenqi Diao, Anping He, Jinzhao Wu
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引用次数: 0

摘要

多项式乘法在通信、信号和图像处理中有着广泛的应用。在实际应用中,系统往往需要高效地处理大量数据,然后输出结果。然而,由于多项式总是多变量和大规模的,单独的软件算法并不能有效地满足实际要求。此外,多项式乘法的关键是矩阵乘法的运算。然而,由于矩阵乘法的结构日益复杂,实现大型矩阵的高效处理和计算是一个挑战。随着FPGA、LSI制造、存储器接口和EDA工具的发展,将硬件应用于多项式乘法成为可能。针对上述问题,我们设计并实现了一个基于FPGA的多项式乘法平台,该平台将硬件与软件相结合,弥补了目前软件算法的不足,同时能够高效有效地进行多项式乘法运算。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An FPGA based Method of Polynomial Multiplication
Polynomial multiplication is widely used in communication, signal and image processing. In practical application, the system often needs to process a large amount of data efficiently and then output the results. However, since polynomials are always multivariable and large-scale, software algorithms alone are not effective to meet the actual requestments. In addition, the key to polynomial multiplication is the operation of matrix multiplication. Nevertheless, due to the increasingly complex structure of matrix multiplication, it is challenging to realize efficient processing and calculation of large matrices. With the development of FPGA, LSI manufacturing, memory interface and EDA tools, it is possible to apply hardware to the polynomial multiplication. To solve the above problems, we have designed and implemented a polynomial multiplication platform based on FPGA, which combines hardware and software to make up for the shortcomings of current software algorithms and at the same time, it can efficiently and effectively operate polynomial multiplication.
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