H. Ahmad, A. Al-Khalili, L. Landsberger, M. Kahrizi
{"title":"二维微机械加速度计","authors":"H. Ahmad, A. Al-Khalili, L. Landsberger, M. Kahrizi","doi":"10.1109/ICECS.1996.584532","DOIUrl":null,"url":null,"abstract":"A surface micromachined 2-D accelerometer is designed and implemented in CMOS. The implementation requires the addition of three masking steps to a commercially available standard CMOS process. It has a /spl plusmn/100 g full range reading and better than 1% linearity within this range with a sensitivity of 0.5 mV/g. The signal detection circuitry is an on-chip switched capacitor charge transfer circuit operating on an internally generated 1 MHz four-phase non-overlapping clock.","PeriodicalId":402369,"journal":{"name":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 2D micromachined accelerometer\",\"authors\":\"H. Ahmad, A. Al-Khalili, L. Landsberger, M. Kahrizi\",\"doi\":\"10.1109/ICECS.1996.584532\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A surface micromachined 2-D accelerometer is designed and implemented in CMOS. The implementation requires the addition of three masking steps to a commercially available standard CMOS process. It has a /spl plusmn/100 g full range reading and better than 1% linearity within this range with a sensitivity of 0.5 mV/g. The signal detection circuitry is an on-chip switched capacitor charge transfer circuit operating on an internally generated 1 MHz four-phase non-overlapping clock.\",\"PeriodicalId\":402369,\"journal\":{\"name\":\"Proceedings of Third International Conference on Electronics, Circuits, and Systems\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Third International Conference on Electronics, Circuits, and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.1996.584532\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Third International Conference on Electronics, Circuits, and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.1996.584532","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A surface micromachined 2-D accelerometer is designed and implemented in CMOS. The implementation requires the addition of three masking steps to a commercially available standard CMOS process. It has a /spl plusmn/100 g full range reading and better than 1% linearity within this range with a sensitivity of 0.5 mV/g. The signal detection circuitry is an on-chip switched capacitor charge transfer circuit operating on an internally generated 1 MHz four-phase non-overlapping clock.