{"title":"基于包的同步方法中时钟选择的增强算法","authors":"Satheesh Kumar S, Prasanth Kemparaj","doi":"10.1109/ISCAIE.2019.8743747","DOIUrl":null,"url":null,"abstract":"Clock selection algorithms plays an important role in selecting the best clock sources from the available pool of candidate clock sources based on many factors. Improper selection of the clock source in the network can have a detrimental impact in the network which could affect services that enables various applications in today’s next generation networks. Though the selection algorithms available as per various standard recommendations, it is important to fine tune and design a prominent method that could be adopted in packet based synchronization method. This paper addresses a new proposal for clock selection algorithms for packet based synchronization method by which the algorithm select the best clock from the candidate clocks to establish most reliable and efficient synchronization mechanism for the real-time deployments that comprises of either SyncE or 1588v2 with physical layer frequency assist as the synchronization transport. This method comprises of selecting a best clock based on the actual clock whose frequency expressed in parts per billion (ppb) seen by the Digital Phase Locked Loop (DPLL) at its inputs instead of selecting the clock based on the traditional clock selection algorithms. This method has a potential benefit of establishing a good frequency clock path throughout the network so that more efficient and reliable clock delivery is achieved within or external to the network. This paper therefore takes care of the potential delivery of bad frequency clock on legacy clock selection algorithm. Analysis and measurement results shows that the proposed method eliminate all the existing issues by conforming all the standard recommendations.","PeriodicalId":369098,"journal":{"name":"2019 IEEE 9th Symposium on Computer Applications & Industrial Electronics (ISCAIE)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Enhanced algorithms for clock selection in a packet based synchronization method\",\"authors\":\"Satheesh Kumar S, Prasanth Kemparaj\",\"doi\":\"10.1109/ISCAIE.2019.8743747\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Clock selection algorithms plays an important role in selecting the best clock sources from the available pool of candidate clock sources based on many factors. Improper selection of the clock source in the network can have a detrimental impact in the network which could affect services that enables various applications in today’s next generation networks. Though the selection algorithms available as per various standard recommendations, it is important to fine tune and design a prominent method that could be adopted in packet based synchronization method. This paper addresses a new proposal for clock selection algorithms for packet based synchronization method by which the algorithm select the best clock from the candidate clocks to establish most reliable and efficient synchronization mechanism for the real-time deployments that comprises of either SyncE or 1588v2 with physical layer frequency assist as the synchronization transport. This method comprises of selecting a best clock based on the actual clock whose frequency expressed in parts per billion (ppb) seen by the Digital Phase Locked Loop (DPLL) at its inputs instead of selecting the clock based on the traditional clock selection algorithms. This method has a potential benefit of establishing a good frequency clock path throughout the network so that more efficient and reliable clock delivery is achieved within or external to the network. This paper therefore takes care of the potential delivery of bad frequency clock on legacy clock selection algorithm. Analysis and measurement results shows that the proposed method eliminate all the existing issues by conforming all the standard recommendations.\",\"PeriodicalId\":369098,\"journal\":{\"name\":\"2019 IEEE 9th Symposium on Computer Applications & Industrial Electronics (ISCAIE)\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 9th Symposium on Computer Applications & Industrial Electronics (ISCAIE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAIE.2019.8743747\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 9th Symposium on Computer Applications & Industrial Electronics (ISCAIE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAIE.2019.8743747","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Enhanced algorithms for clock selection in a packet based synchronization method
Clock selection algorithms plays an important role in selecting the best clock sources from the available pool of candidate clock sources based on many factors. Improper selection of the clock source in the network can have a detrimental impact in the network which could affect services that enables various applications in today’s next generation networks. Though the selection algorithms available as per various standard recommendations, it is important to fine tune and design a prominent method that could be adopted in packet based synchronization method. This paper addresses a new proposal for clock selection algorithms for packet based synchronization method by which the algorithm select the best clock from the candidate clocks to establish most reliable and efficient synchronization mechanism for the real-time deployments that comprises of either SyncE or 1588v2 with physical layer frequency assist as the synchronization transport. This method comprises of selecting a best clock based on the actual clock whose frequency expressed in parts per billion (ppb) seen by the Digital Phase Locked Loop (DPLL) at its inputs instead of selecting the clock based on the traditional clock selection algorithms. This method has a potential benefit of establishing a good frequency clock path throughout the network so that more efficient and reliable clock delivery is achieved within or external to the network. This paper therefore takes care of the potential delivery of bad frequency clock on legacy clock selection algorithm. Analysis and measurement results shows that the proposed method eliminate all the existing issues by conforming all the standard recommendations.