{"title":"一种运行时定制虚拟三维可重构平台的框架","authors":"K. Siozios, D. Soudris, M. Hübner","doi":"10.1109/IPDPSW.2014.201","DOIUrl":null,"url":null,"abstract":"Existing application domains exhibit variations in terms of complexity, performance and power consumption, whereas their efficient implementation onto general-purpose reconfigurable platforms is not always a viable solution. Towards this goal, throughout this paper, we introduce a software-supported framework for supporting efficient customization of these platforms. Rather than similar approaches, where the phase (design-time), our solution provides post-fabrication customization of architectural parameters based on application's inherent requirements through a virtualization layer. For evaluation purposes, the introduced framework was applied to 3-D reconfigurable architectures. Experimental results with applications from various domains prove the effectiveness of our solution, as we achieve average delay and power reduction by 1.43X and 1.15X , respectively, as compared to the existing way for application implementation.","PeriodicalId":153864,"journal":{"name":"2014 IEEE International Parallel & Distributed Processing Symposium Workshops","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Framework for Customizing Virtual 3-D Reconfigurable Platforms at Run-Time\",\"authors\":\"K. Siozios, D. Soudris, M. Hübner\",\"doi\":\"10.1109/IPDPSW.2014.201\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Existing application domains exhibit variations in terms of complexity, performance and power consumption, whereas their efficient implementation onto general-purpose reconfigurable platforms is not always a viable solution. Towards this goal, throughout this paper, we introduce a software-supported framework for supporting efficient customization of these platforms. Rather than similar approaches, where the phase (design-time), our solution provides post-fabrication customization of architectural parameters based on application's inherent requirements through a virtualization layer. For evaluation purposes, the introduced framework was applied to 3-D reconfigurable architectures. Experimental results with applications from various domains prove the effectiveness of our solution, as we achieve average delay and power reduction by 1.43X and 1.15X , respectively, as compared to the existing way for application implementation.\",\"PeriodicalId\":153864,\"journal\":{\"name\":\"2014 IEEE International Parallel & Distributed Processing Symposium Workshops\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-05-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE International Parallel & Distributed Processing Symposium Workshops\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPDPSW.2014.201\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE International Parallel & Distributed Processing Symposium Workshops","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPDPSW.2014.201","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Framework for Customizing Virtual 3-D Reconfigurable Platforms at Run-Time
Existing application domains exhibit variations in terms of complexity, performance and power consumption, whereas their efficient implementation onto general-purpose reconfigurable platforms is not always a viable solution. Towards this goal, throughout this paper, we introduce a software-supported framework for supporting efficient customization of these platforms. Rather than similar approaches, where the phase (design-time), our solution provides post-fabrication customization of architectural parameters based on application's inherent requirements through a virtualization layer. For evaluation purposes, the introduced framework was applied to 3-D reconfigurable architectures. Experimental results with applications from various domains prove the effectiveness of our solution, as we achieve average delay and power reduction by 1.43X and 1.15X , respectively, as compared to the existing way for application implementation.