Low power, high speed carbon nanotube FET based level shifter

This work impacts huge potential of Carbon Nanotube Field Effect Transistor (CNTFET) technology which can replace bulk MOS and FinFET below 32nm regime. In this paper a Level shifter is design to mitigate power consumption in System-on-Chips (SoCs) by applying proper technique to reduces additional power consumption and propagation delay in the circuit. In this research paper, the power and speed of CNT-FET based level shifters at 32-nm technology is calculated. It can increase the overall performance of the circuit by optimising the parameter like chirality, diameter, number of nanotubes and substrate (back gate) bias for both feedback-based and multi-VTH based level shifters. With scaling of VTH sub-threshold leakage power increases exponentially and it is expected to become the significant part of total power consumption. In this paper, our proposed circuit provides amplification of signal by applying input 0.2V and shift the level to 0.9V without degradation of logic level of the signal. As a result, the overall Power Delay Product (PDP) is minimized up to 0.1078 aJ. By applying back gate bias in DCVS-LS PDP is increased to 0.1433 aJ because the VTH of transistor increases.