IPv6路由协议处理体系结构的系统仿真框架

Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on Pub Date : 2003-07-10 DOI:10.1109/SCS.2003.1227010

D. Truscan, S. Virtanen, J. Lilius

{"title":"IPv6路由协议处理体系结构的系统仿真框架","authors":"D. Truscan, S. Virtanen, J. Lilius","doi":"10.1109/SCS.2003.1227010","DOIUrl":null,"url":null,"abstract":"In this paper, we present our use of SystemC to simulate IPv6 router architecture on our TTA based protocol processor. Our approach makes it easy to verify the correct functionality and to identify performances bottlenecks in the architecture within a short time frame. All this is done prior to proceeding to synthesize the processor into hardware.","PeriodicalId":375963,"journal":{"name":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"SystemC simulation framework of protocol processing architectures for IPv6 routing\",\"authors\":\"D. Truscan, S. Virtanen, J. Lilius\",\"doi\":\"10.1109/SCS.2003.1227010\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present our use of SystemC to simulate IPv6 router architecture on our TTA based protocol processor. Our approach makes it easy to verify the correct functionality and to identify performances bottlenecks in the architecture within a short time frame. All this is done prior to proceeding to synthesize the processor into hardware.\",\"PeriodicalId\":375963,\"journal\":{\"name\":\"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-07-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SCS.2003.1227010\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SCS.2003.1227010","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

在本文中，我们介绍了在我们的基于TTA的协议处理器上使用SystemC来模拟IPv6路由器架构。我们的方法可以很容易地验证正确的功能，并在短时间内确定架构中的性能瓶颈。所有这些都是在将处理器合成为硬件之前完成的。

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SystemC simulation framework of protocol processing architectures for IPv6 routing

In this paper, we present our use of SystemC to simulate IPv6 router architecture on our TTA based protocol processor. Our approach makes it easy to verify the correct functionality and to identify performances bottlenecks in the architecture within a short time frame. All this is done prior to proceeding to synthesize the processor into hardware.

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Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on

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