{"title":"一种新的电荷回收方法的再激活-降噪","authors":"Rumi Rastogi, S. Pandey, Mridula Gupta","doi":"10.1109/IC3I44769.2018.9007280","DOIUrl":null,"url":null,"abstract":"MTCMOS proves to be an effective technique in minimizing leakage power. But the basic problem with this technique is the reactivation or transition noise. Various techniques to minimize ground-bouncing noise have been analyzed in this paper. The techniques have been broadly classified in two categories: Sleep signal slew rate modulation techniques and Charge recycling technique. A new charge recycling technique with block dividing approach has also been proposed. All the techniques have been verified with a 32-bit TSPC adder implemented in 45nm technology. The proposed technique reduces the peak amplitude of reactivation noise by 95.2%, 58.5%, 51%, 37% and 73% compared to the compared to the Standard MTCMOS, simple rise-time delay, two-step rise time delay, three-step rise time delay and conventional charge recycling approaches respectively. The proposed technique also suppresses the leakage power and reactivation delay significantly.","PeriodicalId":161694,"journal":{"name":"2018 3rd International Conference on Contemporary Computing and Informatics (IC3I)","volume":"25 5","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A New Charge-Recycling Approach for Reactivation-Noise Reduction\",\"authors\":\"Rumi Rastogi, S. Pandey, Mridula Gupta\",\"doi\":\"10.1109/IC3I44769.2018.9007280\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"MTCMOS proves to be an effective technique in minimizing leakage power. But the basic problem with this technique is the reactivation or transition noise. Various techniques to minimize ground-bouncing noise have been analyzed in this paper. The techniques have been broadly classified in two categories: Sleep signal slew rate modulation techniques and Charge recycling technique. A new charge recycling technique with block dividing approach has also been proposed. All the techniques have been verified with a 32-bit TSPC adder implemented in 45nm technology. The proposed technique reduces the peak amplitude of reactivation noise by 95.2%, 58.5%, 51%, 37% and 73% compared to the compared to the Standard MTCMOS, simple rise-time delay, two-step rise time delay, three-step rise time delay and conventional charge recycling approaches respectively. The proposed technique also suppresses the leakage power and reactivation delay significantly.\",\"PeriodicalId\":161694,\"journal\":{\"name\":\"2018 3rd International Conference on Contemporary Computing and Informatics (IC3I)\",\"volume\":\"25 5\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 3rd International Conference on Contemporary Computing and Informatics (IC3I)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IC3I44769.2018.9007280\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 3rd International Conference on Contemporary Computing and Informatics (IC3I)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IC3I44769.2018.9007280","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A New Charge-Recycling Approach for Reactivation-Noise Reduction
MTCMOS proves to be an effective technique in minimizing leakage power. But the basic problem with this technique is the reactivation or transition noise. Various techniques to minimize ground-bouncing noise have been analyzed in this paper. The techniques have been broadly classified in two categories: Sleep signal slew rate modulation techniques and Charge recycling technique. A new charge recycling technique with block dividing approach has also been proposed. All the techniques have been verified with a 32-bit TSPC adder implemented in 45nm technology. The proposed technique reduces the peak amplitude of reactivation noise by 95.2%, 58.5%, 51%, 37% and 73% compared to the compared to the Standard MTCMOS, simple rise-time delay, two-step rise time delay, three-step rise time delay and conventional charge recycling approaches respectively. The proposed technique also suppresses the leakage power and reactivation delay significantly.