{"title":"静态控制超标量架构","authors":"B. Dinechin","doi":"10.1145/144965.145836","DOIUrl":null,"url":null,"abstract":"Villeneuve St Georges cedex France bdedinechin@cri.ensmp.fr The StaCs (Static Control Superscalar) project, initiated in 1990 at the CAO-VLSI Department of the MASI Laboratory, University of Paris VI, aims to provide an advanced architectural support for compiler algorithms without compromising the efficient exploitation of VLSI technology. This has been achieved mainly by supporting a generalized form of the polycyclic property defined by Rau et al., which allows easy software pipelining of inner loops. The other distinctive characteristic of the StaCs architecture lies in the implementation of a new memory system based on the exploitation of compile-time information.","PeriodicalId":108218,"journal":{"name":"MICRO 25","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"StaCS: a Static Control Superscalar architecture\",\"authors\":\"B. Dinechin\",\"doi\":\"10.1145/144965.145836\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Villeneuve St Georges cedex France bdedinechin@cri.ensmp.fr The StaCs (Static Control Superscalar) project, initiated in 1990 at the CAO-VLSI Department of the MASI Laboratory, University of Paris VI, aims to provide an advanced architectural support for compiler algorithms without compromising the efficient exploitation of VLSI technology. This has been achieved mainly by supporting a generalized form of the polycyclic property defined by Rau et al., which allows easy software pipelining of inner loops. The other distinctive characteristic of the StaCs architecture lies in the implementation of a new memory system based on the exploitation of compile-time information.\",\"PeriodicalId\":108218,\"journal\":{\"name\":\"MICRO 25\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-12-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MICRO 25\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/144965.145836\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MICRO 25","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/144965.145836","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Villeneuve St Georges cedex France bdedinechin@cri.ensmp.fr The StaCs (Static Control Superscalar) project, initiated in 1990 at the CAO-VLSI Department of the MASI Laboratory, University of Paris VI, aims to provide an advanced architectural support for compiler algorithms without compromising the efficient exploitation of VLSI technology. This has been achieved mainly by supporting a generalized form of the polycyclic property defined by Rau et al., which allows easy software pipelining of inner loops. The other distinctive characteristic of the StaCs architecture lies in the implementation of a new memory system based on the exploitation of compile-time information.
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