IRIG-B decoder based on FPGA for synchronization in PMUs by considering different input formats

Time synchronization (TS) represents an important necessity for many industries in fields such as communications, manufacturing, and power systems related to electrical networks, microgrids, and renewable energies, among others, because it can ensure that cooperating processes or systems can interoperate correctly; further, the scheduling of specific tasks through a timestamp can be done. Among different synchronization protocols, the inter-range instrumentation group (IRIG)-B time code has become one of the most employed in real-time information transmission systems because of its accuracy, robustness, and simplicity. In this paper, a field programmable gate array (FPGA)-based IRIG-B decoder is presented. The FPGA used is a Cyclone IV EP4CE115F29; yet, the proposed hardware implementation has a vendor independency. On the other hand, the IRIG-B output is provided by a SEL-2401 Satellite-Synchronized Clock. Results show that the proposal can provide a reliable and accurate time source using the IRIG-B time code. Regarding the FPGA, a low resource usage of the chip is obtained; besides, thanks to its high capabilities of integration and parallelism, a widely number of applications can be incorporated.