OR多址信道的低密度栅格码

M. Griot, A. Casado, Wen-Yen Weng, H. Chan, J. Basak, E. Yablonovitch, I. Verbauwhede, B. Jalali, R. Wesel
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引用次数: 7

摘要

本文提出了栅格代码的Z通道设计,以保持一个相对较低的密度。这些码在脉冲位置调制系统中有应用,并作为二进制或多址信道(MAC)上不协调通信的解决方案。在本文中,我们考虑后一种应用来演示代码的性能。OR信道提供了一个不寻常的机会,其中单用户解码允许在大约70%的多址信道总容量下操作。本文所采用的交织分多址技术在turbo解决方案下应接近该性能。然而,目前的论文关注的是具有简单解码的非常低延迟的代码,旨在用于非常高速(每秒千兆比特)的应用。也就是说,它专注于非线性网格码,它在高速和极低延迟下提供了大约30%的完整多路访问总和容量。这些栅格代码是专门为多用户或通道中出现的z通道设计的,当其他用户被视为噪声时。为了优化OR-MAC的和容量,栅格码传输码字的密度远小于50%。此外,还提出了一种预测这些代码性能的联合边界技术。给出了仿真结果和工作的FPGA实现
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Trellis Codes with Low Ones Density for the OR Multiple Access Channel
This paper presents trellis codes for the Z channel designed to maintain a relatively low ones density. These codes have applications in pulse-position modulation systems and as a solution for uncoordinated communication on the binary OR multiple-access channel (MAC). In this paper we consider the latter application to demonstrate the performance of the codes. The OR channel provides an unusual opportunity where single-user decoding permits operation at about 70% of the full multiple-access channel sum capacity. The interleaver-division multiple access technique applied in this paper should approach that performance with turbo solutions. However, the current paper focuses on very low latency codes with simple decoding, intended for very high speed (gigabits per second) applications. Namely, it focuses on nonlinear trellis codes that provide about 30% of the full multiple-access sum capacity at high speeds and with very low latency. These trellis codes are designed specifically for the Z-channel that arises in a multiple-user OR channel, when the other users are treated as noise. In order to optimize the sum-capacity of the OR-MAC, the trellis code transmits codewords with a ones density much less than 50%. Also, a union bound technique that predicts the performance of these codes is presented. Results from simulations and a working FPGA implementation are shown
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