{"title":"硬件设计中形式化验证的必要性以及形式化验证最近没有为我做什么","authors":"K. Keutzer","doi":"10.1109/HOL.1991.596275","DOIUrl":null,"url":null,"abstract":"The problem of verifying that the design of an integrated circuit will perform the tasks required by its specification is currently a perplexing one for circuit designers. Unfortunately, formal verification techniques in general, and theorem proving techniques in particular, have not been able to alleviate this problem. This paper briefly outlines the verification tasks required in a circuit design and identify those verification tasks for which formal approaches may be most beneficial.","PeriodicalId":213603,"journal":{"name":"1991., International Workshop on the HOL Theorem Proving System and Its Applications","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"The Need For Formal Verification In Hardware Design And What Formal Verification Has Not Done For Me Lately\",\"authors\":\"K. Keutzer\",\"doi\":\"10.1109/HOL.1991.596275\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The problem of verifying that the design of an integrated circuit will perform the tasks required by its specification is currently a perplexing one for circuit designers. Unfortunately, formal verification techniques in general, and theorem proving techniques in particular, have not been able to alleviate this problem. This paper briefly outlines the verification tasks required in a circuit design and identify those verification tasks for which formal approaches may be most beneficial.\",\"PeriodicalId\":213603,\"journal\":{\"name\":\"1991., International Workshop on the HOL Theorem Proving System and Its Applications\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-08-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1991., International Workshop on the HOL Theorem Proving System and Its Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HOL.1991.596275\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1991., International Workshop on the HOL Theorem Proving System and Its Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOL.1991.596275","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The Need For Formal Verification In Hardware Design And What Formal Verification Has Not Done For Me Lately
The problem of verifying that the design of an integrated circuit will perform the tasks required by its specification is currently a perplexing one for circuit designers. Unfortunately, formal verification techniques in general, and theorem proving techniques in particular, have not been able to alleviate this problem. This paper briefly outlines the verification tasks required in a circuit design and identify those verification tasks for which formal approaches may be most beneficial.