硬件设计中形式化验证的必要性以及形式化验证最近没有为我做什么

K. Keutzer
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引用次数: 4

摘要

验证集成电路的设计是否能执行其规格所要求的任务,目前是一个困扰电路设计者的问题。不幸的是,一般的形式验证技术,特别是定理证明技术,并不能缓解这个问题。本文简要概述了电路设计中所需的验证任务,并确定了形式化方法可能最有益的验证任务。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The Need For Formal Verification In Hardware Design And What Formal Verification Has Not Done For Me Lately
The problem of verifying that the design of an integrated circuit will perform the tasks required by its specification is currently a perplexing one for circuit designers. Unfortunately, formal verification techniques in general, and theorem proving techniques in particular, have not been able to alleviate this problem. This paper briefly outlines the verification tasks required in a circuit design and identify those verification tasks for which formal approaches may be most beneficial.
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