A 4 GS/s 3-bit Highly Linear Time-Based Analog- to-Digital Converter for Massive MIMO Systems

Recent studies on modern wireless communication systems are focusing on Massive Multiple- Input Multiple-Output (MIMO) technology for its high potential. MIMO systems require high resolution Analog-to- Digital Converters (ADCs) in the Base Stations (BS) to reduce quantization noise. However, using high resolution ADCs causes higher power consumption at the BS and the hardware costs increase. Reducing the resolution of the ADCs at the BS causes severe non-linearity errors due to additional quantization noise. In other words, MIMO systems cannot achieve high performance without highly linear and low resolution ADCs. In this paper, a 3-bit highly linear Time- based ADC (T-ADC) is presented. The proposed circuit exhibits high linearity, simple design and low power which make it the best solution for the problems that limit the performance of the MIMO systems. The proposed ADC exhibits a linearity error of 0.56 % with a dynamic range equals to 800 mV and at small power consumption of 2.2 mW. The supply voltage used equals to 1.2 V using industrial 65 nm TSMC CMOS technology. The clock frequency equals to 4 GHz at a maximum input frequency of 2 GHz.