Formal Design and Verification of Memory Management Unit Microprocessor

CPU is the core of modern computer system and the foundation of operating system and upper software. Memory management unit (MMU) and cache (Cache) are widely used in modern microprocessor design. They have been improving CPU performance while increasing the difficulties of CPU design and verification. As the structure of today’s CPU is more and more complex, conventional design and verification methods such as testing and simulating can’t guarantee the correctness of CPU structure designs. In this paper, we present an axiomatic system which could be used to formally describe the CPU structure with MMU and Cache. And we propose a formal method to formally verify an instruction path with MMU and Cache based on this axiom system. Meanwhile we develop an automated verification tool and completed formal verification of 86 MIPS instructions efficiently with the tool.