Xiaoxin Xu, Jie Yu, Tiancheng Gong, Jianguo Yang, Jiahao Yin, Da Nian Dong, Q. Luo, Jing Liu, Zhaoan Yu, Qi Liu, H. Lv, Ming Liu
{"title":"14nm FinFet平台上OxRRAM集成的首次演示及亚10nm节点的缩放潜力分析","authors":"Xiaoxin Xu, Jie Yu, Tiancheng Gong, Jianguo Yang, Jiahao Yin, Da Nian Dong, Q. Luo, Jing Liu, Zhaoan Yu, Qi Liu, H. Lv, Ming Liu","doi":"10.1109/IEDM13553.2020.9371971","DOIUrl":null,"url":null,"abstract":"For the first time, the oxide based resistive random access memory (OxRRAM) integrated at 14nm FinFET platform was demonstrated. The scalability potential towards 10nm and beyond was analysis by considering the programing voltage, current and stability factors. Negative bias scheme with deep N well was proposed to solve the voltage mismatch between the OxRRAM and transistor. In order to meet the product-level stability requirement, the operation current was suggested to be higher than 100uA. Based on such constrain, cell size at different technology is projected. As an attempt, a design rule and array architecture was proposed to implement the OxRRAM on 5nm FinFET platform.","PeriodicalId":415186,"journal":{"name":"2020 IEEE International Electron Devices Meeting (IEDM)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"First Demonstration of OxRRAM Integration on 14nm FinFet Platform and Scaling Potential Analysis towards Sub-10nm Node\",\"authors\":\"Xiaoxin Xu, Jie Yu, Tiancheng Gong, Jianguo Yang, Jiahao Yin, Da Nian Dong, Q. Luo, Jing Liu, Zhaoan Yu, Qi Liu, H. Lv, Ming Liu\",\"doi\":\"10.1109/IEDM13553.2020.9371971\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time, the oxide based resistive random access memory (OxRRAM) integrated at 14nm FinFET platform was demonstrated. The scalability potential towards 10nm and beyond was analysis by considering the programing voltage, current and stability factors. Negative bias scheme with deep N well was proposed to solve the voltage mismatch between the OxRRAM and transistor. In order to meet the product-level stability requirement, the operation current was suggested to be higher than 100uA. Based on such constrain, cell size at different technology is projected. As an attempt, a design rule and array architecture was proposed to implement the OxRRAM on 5nm FinFET platform.\",\"PeriodicalId\":415186,\"journal\":{\"name\":\"2020 IEEE International Electron Devices Meeting (IEDM)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE International Electron Devices Meeting (IEDM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM13553.2020.9371971\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM13553.2020.9371971","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
First Demonstration of OxRRAM Integration on 14nm FinFet Platform and Scaling Potential Analysis towards Sub-10nm Node
For the first time, the oxide based resistive random access memory (OxRRAM) integrated at 14nm FinFET platform was demonstrated. The scalability potential towards 10nm and beyond was analysis by considering the programing voltage, current and stability factors. Negative bias scheme with deep N well was proposed to solve the voltage mismatch between the OxRRAM and transistor. In order to meet the product-level stability requirement, the operation current was suggested to be higher than 100uA. Based on such constrain, cell size at different technology is projected. As an attempt, a design rule and array architecture was proposed to implement the OxRRAM on 5nm FinFET platform.