{"title":"基于虚拟内存支持的共享内存多处理器缓存一致性","authors":"K. Petersen, Kai Li","doi":"10.1109/IPPS.1993.262854","DOIUrl":null,"url":null,"abstract":"This paper presents a software cache coherence scheme that uses virtual memory (VM) support to maintain cache coherency for shared memory multiprocessors. Traditional VM translation hardware in each processor is used to detect memory access attempts that would violate cache coherence and system software is used to enforce coherence. The implementation of this class of coherence schemes is very economical: it requires neither special multiprocessor hardware nor compiler support, and easily incorporates different consistency models. The authors evaluated two consistency models for the VM-based approach: sequential consistency and lazy release consistency. The VM-based schemes are compared with a bus based snoopy caching architecture, and the authors' trace-driven simulation results show that the VM-based cache coherence schemes are practical for small-scale, shared memory multiprocessors.<<ETX>>","PeriodicalId":248927,"journal":{"name":"[1993] Proceedings Seventh International Parallel Processing Symposium","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"30","resultStr":"{\"title\":\"Cache coherence for shared memory multiprocessors based on virtual memory support\",\"authors\":\"K. Petersen, Kai Li\",\"doi\":\"10.1109/IPPS.1993.262854\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a software cache coherence scheme that uses virtual memory (VM) support to maintain cache coherency for shared memory multiprocessors. Traditional VM translation hardware in each processor is used to detect memory access attempts that would violate cache coherence and system software is used to enforce coherence. The implementation of this class of coherence schemes is very economical: it requires neither special multiprocessor hardware nor compiler support, and easily incorporates different consistency models. The authors evaluated two consistency models for the VM-based approach: sequential consistency and lazy release consistency. The VM-based schemes are compared with a bus based snoopy caching architecture, and the authors' trace-driven simulation results show that the VM-based cache coherence schemes are practical for small-scale, shared memory multiprocessors.<<ETX>>\",\"PeriodicalId\":248927,\"journal\":{\"name\":\"[1993] Proceedings Seventh International Parallel Processing Symposium\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-04-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"30\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1993] Proceedings Seventh International Parallel Processing Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPPS.1993.262854\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1993] Proceedings Seventh International Parallel Processing Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPPS.1993.262854","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Cache coherence for shared memory multiprocessors based on virtual memory support
This paper presents a software cache coherence scheme that uses virtual memory (VM) support to maintain cache coherency for shared memory multiprocessors. Traditional VM translation hardware in each processor is used to detect memory access attempts that would violate cache coherence and system software is used to enforce coherence. The implementation of this class of coherence schemes is very economical: it requires neither special multiprocessor hardware nor compiler support, and easily incorporates different consistency models. The authors evaluated two consistency models for the VM-based approach: sequential consistency and lazy release consistency. The VM-based schemes are compared with a bus based snoopy caching architecture, and the authors' trace-driven simulation results show that the VM-based cache coherence schemes are practical for small-scale, shared memory multiprocessors.<>