Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee, H. Yoo
{"title":"81.6 GOPS目标识别处理器的内存中心NoC实现","authors":"Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee, H. Yoo","doi":"10.1109/ASSCC.2007.4425679","DOIUrl":null,"url":null,"abstract":"An 81.6 GOPS object recognition processor based on memory-centric NoC (MC-NoC) is implemented in a 0.18-mum CMOS technology. The MC-NoC facilitates data transactions among 10 SIMD processing elements (PEs) by exploiting 8 visual image processing (VIP) memories. The 10 PEs implement special SIMD instructions to perform Gaussian filtering at 16 GOPS. The 8 VIP memories provide one cycle local maximum pixels search operation performing 65.6 GOPS. The chip dissipates 1.4 W at 200 MHz operating frequency.","PeriodicalId":186095,"journal":{"name":"2007 IEEE Asian Solid-State Circuits Conference","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Implementation of Memory-Centric NoC for 81.6 GOPS object recognition processor\",\"authors\":\"Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee, H. Yoo\",\"doi\":\"10.1109/ASSCC.2007.4425679\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An 81.6 GOPS object recognition processor based on memory-centric NoC (MC-NoC) is implemented in a 0.18-mum CMOS technology. The MC-NoC facilitates data transactions among 10 SIMD processing elements (PEs) by exploiting 8 visual image processing (VIP) memories. The 10 PEs implement special SIMD instructions to perform Gaussian filtering at 16 GOPS. The 8 VIP memories provide one cycle local maximum pixels search operation performing 65.6 GOPS. The chip dissipates 1.4 W at 200 MHz operating frequency.\",\"PeriodicalId\":186095,\"journal\":{\"name\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Asian Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSCC.2007.4425679\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Asian Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2007.4425679","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
摘要
基于内存中心NoC (MC-NoC)的81.6 GOPS目标识别处理器采用0.18 μ m CMOS技术实现。MC-NoC通过利用8个视觉图像处理(VIP)存储器,促进了10个SIMD处理元素(pe)之间的数据交易。这10个pe实现了特殊的SIMD指令,以16 GOPS执行高斯滤波。8个VIP存储器提供一个周期的局部最大像素搜索操作,执行65.6 GOPS。当工作频率为200mhz时,功耗为1.4 W。
Implementation of Memory-Centric NoC for 81.6 GOPS object recognition processor
An 81.6 GOPS object recognition processor based on memory-centric NoC (MC-NoC) is implemented in a 0.18-mum CMOS technology. The MC-NoC facilitates data transactions among 10 SIMD processing elements (PEs) by exploiting 8 visual image processing (VIP) memories. The 10 PEs implement special SIMD instructions to perform Gaussian filtering at 16 GOPS. The 8 VIP memories provide one cycle local maximum pixels search operation performing 65.6 GOPS. The chip dissipates 1.4 W at 200 MHz operating frequency.