Characterization of the piezoresistive effect and temperature coefficient of resistance in single crystalline silicon nanowires

This paper reports the design, fabrication and evaluation of piezoresistive effect of the top-down fabricated p-type <110> Si Nanowires (SiNWs). The SiNWs with the length of 2µm, thickness of 35nm and width ranges from 35nm to 490nm have been fabricated by electron beam (EB) direct writing and reactive ion etching (RIE). The impurity concentration of the SiNWs is 2×1018 cm−3, obtained by ion implantation. The SiNWs are protected by a thermally grown SiO2 to avoid the environment influence and to deactivate the outer layer, which was attacked during RIE process. Dependence of piezoresistive effects on the width of the SiNWs of both longitudinal and transverse SiNWs has been characterized. The significant increasing had been found in longitudinal piezoresistive coefficient πl[110]. The results showed that when the width of the SiNWs reduces to nanometer size, the smaller the width, the bigger the piezoresistive coefficient. The coefficient πl[110] along <110> crystallographic orientation increased up to 60% when the width of SiNWs down from 490nm to 35nm. Furthermore, rather small influence of temperature to piezoresistive coefficient has been characterized. Piezoresistive effect slightly decreases when the temperature increases. The temperature coefficient of resistance (TCR) of the SiNWs has been measured to be from 450 to 850ppm/°C, i.e. about 8 times smaller than that of bulk silicon at same doping concentration. These excellent characteristics are important for high sensitive and low-temperature-affected mechanical sensors.