Kunal Korgaonkar, Prabhat Jain, Deepak Tomar, Kashyap Garimella, Kamakoti Veezhinathan
{"title":"重构工作负载优化系统的硬件事务内存","authors":"Kunal Korgaonkar, Prabhat Jain, Deepak Tomar, Kashyap Garimella, Kamakoti Veezhinathan","doi":"10.1007/978-3-642-24151-2_1","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":243555,"journal":{"name":"Advanced Parallel Programming Technologies","volume":"163 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Reconstructing Hardware Transactional Memory for Workload Optimized Systems\",\"authors\":\"Kunal Korgaonkar, Prabhat Jain, Deepak Tomar, Kashyap Garimella, Kamakoti Veezhinathan\",\"doi\":\"10.1007/978-3-642-24151-2_1\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\",\"PeriodicalId\":243555,\"journal\":{\"name\":\"Advanced Parallel Programming Technologies\",\"volume\":\"163 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-09-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Advanced Parallel Programming Technologies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1007/978-3-642-24151-2_1\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Advanced Parallel Programming Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/978-3-642-24151-2_1","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0