An Overview of IDDQ Sensor Techniques

Normally for CMOS devices, current and power is consumed only when a device switches state from off-to-on or on-to-off. Defect mechanisms such as gate-oxide shorts, bridges between layers, leaky p-n junctions, or pin-hole defects can cause elevated current states that can be measured during non-transitional parts of the circuits operation. Detection of these abnormally large supply currents (IDDQ) in the power (VDD) or ground (GND) busses during a normally quiescent operating time allows detection of these physical defect mechanisms which normally are not accounted for when using simple stuck-at-fault testing. This paper presents an overview of IDDQ sensor techniques and presents an improved on-chip IDDQ current sensor which increases test application time from 1 MHz [1] to 8 Mhz.