{"title":"用于空间应用的低功耗0.25 /spl mu/m ASIC技术","authors":"N. Haddad, R. Berger, R.D. Brown","doi":"10.1109/AERO.2001.931196","DOIUrl":null,"url":null,"abstract":"The advent of broadband space communication has accelerated the need for high density, high performance, low power radiation hardened technology. A 0.25 /spl mu/m CMOS radiation enhanced ASIC library was developed and demonstrated. The library is compatible with state-of-the-art radiation tolerant commercial foundry fabrication and offers a significant advancement over the latest radiation hardened technology now in production. The Library supports 70 ps delay, 0.02 /spl mu/W/Gate/MHz power consumption and up to 7M gate/chip density, and achieves an upset rate of <1E-10 upset/bit/day in the 90% geosynchronous environment. The technology is latch-up immune and supports a total dose of >200 Krad (Si) in the natural space environment.","PeriodicalId":329225,"journal":{"name":"2001 IEEE Aerospace Conference Proceedings (Cat. No.01TH8542)","volume":" 796","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Low power 0.25 /spl mu/m ASIC technology for space applications\",\"authors\":\"N. Haddad, R. Berger, R.D. Brown\",\"doi\":\"10.1109/AERO.2001.931196\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The advent of broadband space communication has accelerated the need for high density, high performance, low power radiation hardened technology. A 0.25 /spl mu/m CMOS radiation enhanced ASIC library was developed and demonstrated. The library is compatible with state-of-the-art radiation tolerant commercial foundry fabrication and offers a significant advancement over the latest radiation hardened technology now in production. The Library supports 70 ps delay, 0.02 /spl mu/W/Gate/MHz power consumption and up to 7M gate/chip density, and achieves an upset rate of <1E-10 upset/bit/day in the 90% geosynchronous environment. The technology is latch-up immune and supports a total dose of >200 Krad (Si) in the natural space environment.\",\"PeriodicalId\":329225,\"journal\":{\"name\":\"2001 IEEE Aerospace Conference Proceedings (Cat. No.01TH8542)\",\"volume\":\" 796\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-03-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2001 IEEE Aerospace Conference Proceedings (Cat. No.01TH8542)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AERO.2001.931196\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2001 IEEE Aerospace Conference Proceedings (Cat. No.01TH8542)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AERO.2001.931196","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
宽带空间通信的出现加速了对高密度、高性能、低功耗抗辐射技术的需求。研制并演示了0.25 /spl μ m CMOS辐射增强专用集成电路库。该库与最先进的耐辐射商业铸造制造兼容,并提供了目前生产中最新的辐射硬化技术的重大进步。该库支持70 ps延迟,0.02 /spl mu/W/Gate/MHz功耗和高达7M的栅极/芯片密度,在自然空间环境下实现200 Krad (Si)的扰流率。
Low power 0.25 /spl mu/m ASIC technology for space applications
The advent of broadband space communication has accelerated the need for high density, high performance, low power radiation hardened technology. A 0.25 /spl mu/m CMOS radiation enhanced ASIC library was developed and demonstrated. The library is compatible with state-of-the-art radiation tolerant commercial foundry fabrication and offers a significant advancement over the latest radiation hardened technology now in production. The Library supports 70 ps delay, 0.02 /spl mu/W/Gate/MHz power consumption and up to 7M gate/chip density, and achieves an upset rate of <1E-10 upset/bit/day in the 90% geosynchronous environment. The technology is latch-up immune and supports a total dose of >200 Krad (Si) in the natural space environment.