{"title":"非晶硅基金属-绝缘体-半导体结构的电容-电压特性","authors":"J.S. Choi, G. Neudeck","doi":"10.1109/UGIM.1991.148130","DOIUrl":null,"url":null,"abstract":"A capacitance-voltage model for the a-Si:H-based metal-insulator-semiconductor (MIS) structure is presented, along with an alternative direct measurement method. The C-V model is based on the static I-V model developed using the simplified CFO band model for the a-Si bulk band gap states and the simplified Davis-Mott model for the surface states. The frequency variation of the measured admittance, using a somewhat modified thin-film transistor (TFT), is also modeled with the lateral flow transmission line model. These models can be used to monitor TFT-fabrication parameters and to extract accurate capacitance model parameters.<<ETX>>","PeriodicalId":163406,"journal":{"name":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","volume":"73 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Capacitance-voltage characteristics of amorphous silicon based metal-insulator-semiconductor structure\",\"authors\":\"J.S. Choi, G. Neudeck\",\"doi\":\"10.1109/UGIM.1991.148130\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A capacitance-voltage model for the a-Si:H-based metal-insulator-semiconductor (MIS) structure is presented, along with an alternative direct measurement method. The C-V model is based on the static I-V model developed using the simplified CFO band model for the a-Si bulk band gap states and the simplified Davis-Mott model for the surface states. The frequency variation of the measured admittance, using a somewhat modified thin-film transistor (TFT), is also modeled with the lateral flow transmission line model. These models can be used to monitor TFT-fabrication parameters and to extract accurate capacitance model parameters.<<ETX>>\",\"PeriodicalId\":163406,\"journal\":{\"name\":\"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium\",\"volume\":\"73 5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/UGIM.1991.148130\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/UGIM.1991.148130","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Capacitance-voltage characteristics of amorphous silicon based metal-insulator-semiconductor structure
A capacitance-voltage model for the a-Si:H-based metal-insulator-semiconductor (MIS) structure is presented, along with an alternative direct measurement method. The C-V model is based on the static I-V model developed using the simplified CFO band model for the a-Si bulk band gap states and the simplified Davis-Mott model for the surface states. The frequency variation of the measured admittance, using a somewhat modified thin-film transistor (TFT), is also modeled with the lateral flow transmission line model. These models can be used to monitor TFT-fabrication parameters and to extract accurate capacitance model parameters.<>