VHDL和模糊逻辑if-then规则

A. Zamfirescu, C. Ussery
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引用次数: 14

摘要

探讨了用VHSIC硬件描述语言(VHDL)对模糊逻辑系统建模的可行性。重点放在相互作用的对象集合的行为的表示和分析上,每个对象的特征都是模糊的if-then规则。探讨了用VHDL对此类系统进行建模的可行性和可取性,并通过实例对所提出的思想进行了验证。讨论了使用硬件描述语言(hdl),特别是VHDL对模糊逻辑建模的重要性和未来趋势
本文章由计算机程序翻译,如有差异,请以英文原文为准。
VHDL and fuzzy logic if-then rules
The authors explore the feasibility of using VHSIC hardware description language (VHDL) to model systems utilizing fuzzy logic. Emphasis is placed on the representation and analysis of the behavior of collections of interacting objects, each of which is characterized by fuzzy if-then rules. The feasibility and desirability of using VHDL to model such systems is examined, and an example is used to test the ideas developed. A discussion of the importance and future trends in modeling fuzzy logic using hardware description languages (HDLs), and VHDL in particular, is provided.<>
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