Performance Analysis of Radio Frequency (RF) Low Noise Amplifier (LNA) with various Transistor Configurations

In a radio frequency (RF) transceiver, low noise amplifier (LNA) plays a critical role in determining the receiver performance. This paper elucidates the design of an LNA for optimizing its gain, noise figure and stability factor with different transistor configurations in the frequency range of 5-6 GHz. Design-optimization of LNA has been performed with standard transistor (BJT and MOSFET) files in circuit simulation software. For comparison we have considered the following configurations of LNA: (i) a single stage npn BJT LNA, (ii) npn BJT and NMOS cascode LNA, and (iii) npn BJT and CMOS cascode LNA. Simulation results show that compared to other configurations npn BJT-NMOS cascode LNA depicts the highest gain of 20.42 dB and the lowest noise figure of 0.25. On the other hand, npn BJT-CMOS cascode LNA demonstrates the highest stability factor of 1.07 followed by npn BJT LNA and npn BJT-NMOS cascode LNA configurations respectively. Further improvement in the LNA performance metrics is feasible by parametric optimization of transistor parameters and passive elements in the matching network.