采用异质栅浮栅mos结构的铁电模拟联想存储技术

D. Kobayashi, T. Shibata, Y. Fujimori, T. Nakamura, H. Takasu
{"title":"采用异质栅浮栅mos结构的铁电模拟联想存储技术","authors":"D. Kobayashi, T. Shibata, Y. Fujimori, T. Nakamura, H. Takasu","doi":"10.1109/VLSIT.2002.1015415","DOIUrl":null,"url":null,"abstract":"An analog associative memory technology has been developed using ferroelectric materials as a means of storing template vector information. In order to accommodate the associative memory cell to a wide voltage range of the input signal, a hetero-gate floating-gate-MOS structure has been introduced. The concept has been experimentally verified using fabricated test devices and circuits.","PeriodicalId":103040,"journal":{"name":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A ferroelectric analog associative memory technology employing hetero-gate floating-gate-MOS structure\",\"authors\":\"D. Kobayashi, T. Shibata, Y. Fujimori, T. Nakamura, H. Takasu\",\"doi\":\"10.1109/VLSIT.2002.1015415\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An analog associative memory technology has been developed using ferroelectric materials as a means of storing template vector information. In order to accommodate the associative memory cell to a wide voltage range of the input signal, a hetero-gate floating-gate-MOS structure has been introduced. The concept has been experimentally verified using fabricated test devices and circuits.\",\"PeriodicalId\":103040,\"journal\":{\"name\":\"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2002.1015415\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2002.1015415","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

利用铁电材料作为模板向量信息的存储手段,开发了一种模拟联想存储技术。为了使联想存储单元适应宽电压范围的输入信号,引入了一种异栅浮栅mos结构。这一概念已经用自制的测试装置和电路进行了实验验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A ferroelectric analog associative memory technology employing hetero-gate floating-gate-MOS structure
An analog associative memory technology has been developed using ferroelectric materials as a means of storing template vector information. In order to accommodate the associative memory cell to a wide voltage range of the input signal, a hetero-gate floating-gate-MOS structure has been introduced. The concept has been experimentally verified using fabricated test devices and circuits.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信