一种新的残差评估硬件算法

1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461) Pub Date : 1999-10-20 DOI:10.1109/SIPS.1999.822374

K. Karagianni, T. Stouraitis

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引用次数: 1

摘要

介绍了一种将整数X转换为其残数模块m的有效硬件算法。该算法基于从输入X中选择适当的m的倍数连续减去，并且通过低复杂度的硬件可以快速评估剩余。并提出了实现该算法的VLSI架构。

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A novel hardware algorithm for residue evaluation

An efficient hardware algorithm for the conversion of an integer X to its residue module a predefined integer m, is introduced. The algorithm is based on successive subtractions of appropriately selected multiples of m, from the input X, and it leads to fast evaluation of the residue, via hardware of low complexity. A VLSI architecture for the implementation of the algorithm is also proposed.

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来源期刊

1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)

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