{"title":"IEEE 1588的同步和同步功能完全在硬件上实现","authors":"Sven Meier, Hans Weibel, Karl Weber","doi":"10.1109/ISPCS.2008.4659209","DOIUrl":null,"url":null,"abstract":"The Precision Time Protocol (PTP) is an application layer protocol and therefore destined to be implemented in software. Hardware functions, if present, include a high resolution clock that helps to generate precise timestamps for PTP messages. The presented paper describes an IEEE 1588 clock that realizes syntonization and synchronization functions completely in hardware. It combines a three-port bridge with peer-to-peer Transparent Clock (TC) functionality and an Ordinary Clock (OC), together with other protocol and application specific logic within an FPGA. The aim of such an implementation is to provide a high accuracy and robust system clock that can be driven by a simple crystal oscillator. It can cope with oscillator instabilities caused by environmental effects such as fast temperature changes or accelerations (shock/vibration). It may deliver synchronicity in deeply cascaded topologies.","PeriodicalId":428276,"journal":{"name":"2008 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","volume":"72 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":"{\"title\":\"IEEE 1588 syntonization and synchronization functions completely realized in hardware\",\"authors\":\"Sven Meier, Hans Weibel, Karl Weber\",\"doi\":\"10.1109/ISPCS.2008.4659209\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The Precision Time Protocol (PTP) is an application layer protocol and therefore destined to be implemented in software. Hardware functions, if present, include a high resolution clock that helps to generate precise timestamps for PTP messages. The presented paper describes an IEEE 1588 clock that realizes syntonization and synchronization functions completely in hardware. It combines a three-port bridge with peer-to-peer Transparent Clock (TC) functionality and an Ordinary Clock (OC), together with other protocol and application specific logic within an FPGA. The aim of such an implementation is to provide a high accuracy and robust system clock that can be driven by a simple crystal oscillator. It can cope with oscillator instabilities caused by environmental effects such as fast temperature changes or accelerations (shock/vibration). It may deliver synchronicity in deeply cascaded topologies.\",\"PeriodicalId\":428276,\"journal\":{\"name\":\"2008 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication\",\"volume\":\"72 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"38\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPCS.2008.4659209\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPCS.2008.4659209","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
IEEE 1588 syntonization and synchronization functions completely realized in hardware
The Precision Time Protocol (PTP) is an application layer protocol and therefore destined to be implemented in software. Hardware functions, if present, include a high resolution clock that helps to generate precise timestamps for PTP messages. The presented paper describes an IEEE 1588 clock that realizes syntonization and synchronization functions completely in hardware. It combines a three-port bridge with peer-to-peer Transparent Clock (TC) functionality and an Ordinary Clock (OC), together with other protocol and application specific logic within an FPGA. The aim of such an implementation is to provide a high accuracy and robust system clock that can be driven by a simple crystal oscillator. It can cope with oscillator instabilities caused by environmental effects such as fast temperature changes or accelerations (shock/vibration). It may deliver synchronicity in deeply cascaded topologies.