Design of a Flexible, Energy Efficient (Auto)Correlator Block for Timing Synchronization

Multi-mode and multi-standard connectivity has become a necessity for portable communication systems. A convenient architectural solution is to build flexible systems that can be reprogrammed to meet requirements of multiple standards. One of the major issues in this context is the resource overhead required by programmability. In particular, in the latest VLSI technology nodes, energy consumption has become a very severe problem, greatly impacting the reliability of the hardware. Therefore, any design aimed at the implementation of multi-mode multi-standard communication systems must be strictly targeted at the lowest power consumption without jeopardizing peak performance, while, at the same time, retaining a high degree of flexibility. This work presents the design and implementation of a (auto)correlator block for timing synchronization. The design is composed of a scalable computational unit, which allows to meet real-time requirements of different wireless communication standards (e.g. W-CDMA, IEEE 802.11a/g/n). Moreover, dynamic power management allows to dynamically trade-off energy consumption versus performance, adapting power dissipation to the specific requirements of each supported standard, as well as to follow dynamic variations of the computation load.