T. Smilkstein, K. Tati, Parashar Barve, M. Hai, Kittisak Sajjapongse, Durgesh K. Sharma
{"title":"一个进化算法测试平台,用于在硬件上快速实现算法","authors":"T. Smilkstein, K. Tati, Parashar Barve, M. Hai, Kittisak Sajjapongse, Durgesh K. Sharma","doi":"10.1109/ESDIS.2009.4938999","DOIUrl":null,"url":null,"abstract":"We have developed a general purpose evolutionary algorithm testbed (GPeat) that allows evolutionary algorithm designers to quickly and with minimal hardware knowledge move their algorithms into hardware. A user programs the testbed through a graphical user interface (GUI) that lets the user choose system parameters such as types and combinations of crossovers and mutations, initial population descriptions, fitness function rules, criteria for selection and elitism rates. A variety of sensors or computer connections can be made to the testbed so that both intrinsic and extrinsic runs can be carried out. Outputs of the testbed can likewise be computer or device directed. Use of the GUI requires minimal knowledge of hardware and connecting sensors and output devices to the board requires only the ability to identify basic device characteristics (i.e. voltage or current output, analog or digital output). In this first version, sensor inputs, fitness/chromosome value pairs, generated initial values, selected outputs are dumped to a file on the computer for analysis. New evolutionary algorithm specific hardware structures have also been developed which can provide faster run times than direct FPGA implementations. This tool will allow quick prototyping for those wanting to move their algorithms from the computer to the real world, the option to use the hardware as a debugging tool or as the final embedded, portable evolutionary algorithm hardware system.","PeriodicalId":257215,"journal":{"name":"2009 IEEE Workshop on Evolving and Self-Developing Intelligent Systems","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An evolutionary algorithm testbed for quick implementation of algorithms in hardware\",\"authors\":\"T. Smilkstein, K. Tati, Parashar Barve, M. Hai, Kittisak Sajjapongse, Durgesh K. Sharma\",\"doi\":\"10.1109/ESDIS.2009.4938999\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have developed a general purpose evolutionary algorithm testbed (GPeat) that allows evolutionary algorithm designers to quickly and with minimal hardware knowledge move their algorithms into hardware. A user programs the testbed through a graphical user interface (GUI) that lets the user choose system parameters such as types and combinations of crossovers and mutations, initial population descriptions, fitness function rules, criteria for selection and elitism rates. A variety of sensors or computer connections can be made to the testbed so that both intrinsic and extrinsic runs can be carried out. Outputs of the testbed can likewise be computer or device directed. Use of the GUI requires minimal knowledge of hardware and connecting sensors and output devices to the board requires only the ability to identify basic device characteristics (i.e. voltage or current output, analog or digital output). In this first version, sensor inputs, fitness/chromosome value pairs, generated initial values, selected outputs are dumped to a file on the computer for analysis. New evolutionary algorithm specific hardware structures have also been developed which can provide faster run times than direct FPGA implementations. This tool will allow quick prototyping for those wanting to move their algorithms from the computer to the real world, the option to use the hardware as a debugging tool or as the final embedded, portable evolutionary algorithm hardware system.\",\"PeriodicalId\":257215,\"journal\":{\"name\":\"2009 IEEE Workshop on Evolving and Self-Developing Intelligent Systems\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE Workshop on Evolving and Self-Developing Intelligent Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESDIS.2009.4938999\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Workshop on Evolving and Self-Developing Intelligent Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESDIS.2009.4938999","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An evolutionary algorithm testbed for quick implementation of algorithms in hardware
We have developed a general purpose evolutionary algorithm testbed (GPeat) that allows evolutionary algorithm designers to quickly and with minimal hardware knowledge move their algorithms into hardware. A user programs the testbed through a graphical user interface (GUI) that lets the user choose system parameters such as types and combinations of crossovers and mutations, initial population descriptions, fitness function rules, criteria for selection and elitism rates. A variety of sensors or computer connections can be made to the testbed so that both intrinsic and extrinsic runs can be carried out. Outputs of the testbed can likewise be computer or device directed. Use of the GUI requires minimal knowledge of hardware and connecting sensors and output devices to the board requires only the ability to identify basic device characteristics (i.e. voltage or current output, analog or digital output). In this first version, sensor inputs, fitness/chromosome value pairs, generated initial values, selected outputs are dumped to a file on the computer for analysis. New evolutionary algorithm specific hardware structures have also been developed which can provide faster run times than direct FPGA implementations. This tool will allow quick prototyping for those wanting to move their algorithms from the computer to the real world, the option to use the hardware as a debugging tool or as the final embedded, portable evolutionary algorithm hardware system.