一种超低幅相不平衡的24ghz iq解调器

2017 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC) Pub Date : 2017-08-01 DOI:10.1109/IMOC.2017.8121035

Yaoshun Ding, S. Vehring, D. Maurath, S. Barbin, F. Gerfers, G. Boeck

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引用次数: 2

摘要

介绍了一种采用65nm块体CMOS技术的24ghz正交解调器(iq -解调器)。提出的iq解调器由两个直接下变频混频器和一个90°相移多相滤波器组成。两个混频器通过带有ESD保护的片上偏置匹配网络匹配到50欧姆。采用寄生电感补偿技术来减小IQ不平衡。所提出的iq解调器用5 dBm的LO功率进行了测量。测量结果表明，峰值转换增益为7.3 dB, IQ相位和幅度不平衡分别为0.1 dB和6度。解调器的总功耗为16mw。有效芯片面积为0.42 mm2。

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A 24 GHz IQ-demodulator with ultra-low amplitude and phase imbalance

This paper describes a 24 GHz quadrature demodulator (IQ-demodulator) using 65 nm bulk CMOS technology. The proposed IQ-demodulator consists of two direct down conversion mixers and a polyphase filter for 90° phase shifting. The two mixers are matched to 50 ohm by an on-chip bias-tee matching network with ESD protection. The parasitic inductance compensation technique is used to minimize the IQ imbalance. The proposed IQ-demodulator is measured with 5 dBm LO power. Measurement results show a peak conversion gain of 7.3 dB with IQ phase and amplitude imbalances of 0.1 dB and 6 degree, respectively. The total power consumption of the demodulator is 16 mW. The active chip area is 0.42 mm2.

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2017 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC)

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