Navaneethan S, S. Nath, Udaya Krishnan M, Sakthekannan M S, Yogavignes B M, Lokesh Krishnaa M
{"title":"带BRAM和VGA接口的FPGA多媒体图像显示","authors":"Navaneethan S, S. Nath, Udaya Krishnan M, Sakthekannan M S, Yogavignes B M, Lokesh Krishnaa M","doi":"10.1109/ICCES57224.2023.10192822","DOIUrl":null,"url":null,"abstract":"Using a Field-Programmable Gate Array, this work aims to develop a multimedia system, on-chip Block RAM (BRAM), and a Video Graphics Array (VGA) interface. The system will be centered around a VGA monitor that will display multimedia information. The BRAM will temporarily store the image data while the FPGA converts it to a format compatible with the VGA display. The system can produce 24-bit color at a resolution of 100x100. Verilog will be used to construct the hardware, whilst Xilinx will be used for simulation. To demonstrate how the system operates, it will be tested on an FPGA development board. This work aims to create a low-cost, high-performance approach for rendering and processing pictures for use in multimedia applications.","PeriodicalId":442189,"journal":{"name":"2023 8th International Conference on Communication and Electronics Systems (ICCES)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Image Display using FPGA with BRAM and VGA Interface for Multimedia Applications\",\"authors\":\"Navaneethan S, S. Nath, Udaya Krishnan M, Sakthekannan M S, Yogavignes B M, Lokesh Krishnaa M\",\"doi\":\"10.1109/ICCES57224.2023.10192822\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Using a Field-Programmable Gate Array, this work aims to develop a multimedia system, on-chip Block RAM (BRAM), and a Video Graphics Array (VGA) interface. The system will be centered around a VGA monitor that will display multimedia information. The BRAM will temporarily store the image data while the FPGA converts it to a format compatible with the VGA display. The system can produce 24-bit color at a resolution of 100x100. Verilog will be used to construct the hardware, whilst Xilinx will be used for simulation. To demonstrate how the system operates, it will be tested on an FPGA development board. This work aims to create a low-cost, high-performance approach for rendering and processing pictures for use in multimedia applications.\",\"PeriodicalId\":442189,\"journal\":{\"name\":\"2023 8th International Conference on Communication and Electronics Systems (ICCES)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 8th International Conference on Communication and Electronics Systems (ICCES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCES57224.2023.10192822\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 8th International Conference on Communication and Electronics Systems (ICCES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCES57224.2023.10192822","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Image Display using FPGA with BRAM and VGA Interface for Multimedia Applications
Using a Field-Programmable Gate Array, this work aims to develop a multimedia system, on-chip Block RAM (BRAM), and a Video Graphics Array (VGA) interface. The system will be centered around a VGA monitor that will display multimedia information. The BRAM will temporarily store the image data while the FPGA converts it to a format compatible with the VGA display. The system can produce 24-bit color at a resolution of 100x100. Verilog will be used to construct the hardware, whilst Xilinx will be used for simulation. To demonstrate how the system operates, it will be tested on an FPGA development board. This work aims to create a low-cost, high-performance approach for rendering and processing pictures for use in multimedia applications.