F. Hill, Eltayeb Abuelyamen, Wei-Kang Huang, Guo-Qiang Shen
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A new two task algorithm for clock mode fault simulation in sequential circuits
A novel approach to clock-mode simulation of sequential circuits is introduced. Surrogate fault propagation is used for processing stored faults and extracting new faults from combinational logic. Problem fault types are analyzed and treated as exceptions.<>
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