真实双表的VHDL建模

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference Pub Date : 1993-09-20 DOI:10.1109/EURDAC.1993.410677

A. Acosta, A. Barriga, M. Valencia-Barrero, M. J. Díaz, J. Huertas

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引用次数: 5

摘要

提出了一个完整的双稳态模型，包括它们的亚稳态操作。RS-NAND锁存器已被建模为基本结构，其实现方向是将其包含在细胞库中。包括两个应用:一个更复杂的锁存器(d型)的描述和一个包含三个锁存器的电路的描述，其中亚稳信号被传播。仿真结果表明，该模型提供了非常真实的器件行为信息，而这些信息目前只能通过电仿真来获得。

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Modeling of real bistables in VHDL

A complete VHDL model of bistables including their metastable operation is presented. An RS-NAND latch has been modeled as a basic structure, orienting its implementation towards its inclusion in a cell library. Two applications are included: a description of a more complex latch (D-type) and a description of a circuit containing three latches where metastable signals are propagated. Simulation results show that the presented model provides very realistic information about the device behavior, which until now had to be obtained through electric simulation.<>

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来源期刊

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference

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