{"title":"Flash型模数转换器的高通量电路设计","authors":"Shivalasya Chinthala, M. Basiri","doi":"10.1109/RAIT57693.2023.10126785","DOIUrl":null,"url":null,"abstract":"Analog to Digital Converters (ADCs) have a good scope of application due to their high reliability, speed, band-width, and resolution. They are used in digital signal processing devices, satellite communications, digital storage oscilloscopes, micro-controllers, RADAR processing, and digital multimeters. In this paper, we propose a high throughput circuit design that performs multiple ADC operations in parallel by using the same hardware. The proposed high throughput design can be configured with a control line to perform one 3-bit operation or two 2-bit operations in parallel. The throughput of the 3-bit Flash Type conventional ADC is increased by 10 times using the proposed hardware design. All the proposed and conventional designs are implemented with 90 nm CMOS library in Cadence Virtuoso.","PeriodicalId":281845,"journal":{"name":"2023 5th International Conference on Recent Advances in Information Technology (RAIT)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High Throughput Circuit Design of Flash Type Analog to Digital Converter\",\"authors\":\"Shivalasya Chinthala, M. Basiri\",\"doi\":\"10.1109/RAIT57693.2023.10126785\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Analog to Digital Converters (ADCs) have a good scope of application due to their high reliability, speed, band-width, and resolution. They are used in digital signal processing devices, satellite communications, digital storage oscilloscopes, micro-controllers, RADAR processing, and digital multimeters. In this paper, we propose a high throughput circuit design that performs multiple ADC operations in parallel by using the same hardware. The proposed high throughput design can be configured with a control line to perform one 3-bit operation or two 2-bit operations in parallel. The throughput of the 3-bit Flash Type conventional ADC is increased by 10 times using the proposed hardware design. All the proposed and conventional designs are implemented with 90 nm CMOS library in Cadence Virtuoso.\",\"PeriodicalId\":281845,\"journal\":{\"name\":\"2023 5th International Conference on Recent Advances in Information Technology (RAIT)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-03-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 5th International Conference on Recent Advances in Information Technology (RAIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RAIT57693.2023.10126785\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 5th International Conference on Recent Advances in Information Technology (RAIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RAIT57693.2023.10126785","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High Throughput Circuit Design of Flash Type Analog to Digital Converter
Analog to Digital Converters (ADCs) have a good scope of application due to their high reliability, speed, band-width, and resolution. They are used in digital signal processing devices, satellite communications, digital storage oscilloscopes, micro-controllers, RADAR processing, and digital multimeters. In this paper, we propose a high throughput circuit design that performs multiple ADC operations in parallel by using the same hardware. The proposed high throughput design can be configured with a control line to perform one 3-bit operation or two 2-bit operations in parallel. The throughput of the 3-bit Flash Type conventional ADC is increased by 10 times using the proposed hardware design. All the proposed and conventional designs are implemented with 90 nm CMOS library in Cadence Virtuoso.