{"title":"基于VLSI芯片的空间飞行器雷达信号测速分析","authors":"Dr.E.N. Ganesh.","doi":"10.54105/ijvlsid.c1207.031322","DOIUrl":null,"url":null,"abstract":"The objective of the project is to design a low cost Spectral Monitor for a Space vehicle velocity measurement application, based on Doppler Shift principle by generating an radar signal source from earth station towards moving target device in space and processing received high speed analog 200MHz radar signal from target vehicle device through Antenna, analog pre-processing and FPGA based spectral analyzer. The hardware reconfigurable spectral analyzer design consist of ADC(500MSPS) Interface block, SRAM Memory(1024x16) block, Radix-2 FFT (16 bit DSP block) and LCD Display (Monitoring) driver algorithm implemented On-Chip SOC-FPGA system. The proposed algorithm can be used to meet the need of many real time application such as space exploration, wideband communication, command and control application. The desired algorithm is implemented on-chip reconfigurable hardware SOC-FPGA while keeping the cost, power and area of device low compared to general purpose processor and Embedded based microcontroller. The code architecture is described using hardware description language, VHDL and synthesized and simulated using Xilinx 12.2 ISE Design suite.","PeriodicalId":275481,"journal":{"name":"Indian Journal of VLSI Design","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analysis of Velocity Measurement of Radar Signal in Space Vehicle Application using VLSI Chip\",\"authors\":\"Dr.E.N. Ganesh.\",\"doi\":\"10.54105/ijvlsid.c1207.031322\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The objective of the project is to design a low cost Spectral Monitor for a Space vehicle velocity measurement application, based on Doppler Shift principle by generating an radar signal source from earth station towards moving target device in space and processing received high speed analog 200MHz radar signal from target vehicle device through Antenna, analog pre-processing and FPGA based spectral analyzer. The hardware reconfigurable spectral analyzer design consist of ADC(500MSPS) Interface block, SRAM Memory(1024x16) block, Radix-2 FFT (16 bit DSP block) and LCD Display (Monitoring) driver algorithm implemented On-Chip SOC-FPGA system. The proposed algorithm can be used to meet the need of many real time application such as space exploration, wideband communication, command and control application. The desired algorithm is implemented on-chip reconfigurable hardware SOC-FPGA while keeping the cost, power and area of device low compared to general purpose processor and Embedded based microcontroller. The code architecture is described using hardware description language, VHDL and synthesized and simulated using Xilinx 12.2 ISE Design suite.\",\"PeriodicalId\":275481,\"journal\":{\"name\":\"Indian Journal of VLSI Design\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Indian Journal of VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.54105/ijvlsid.c1207.031322\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Indian Journal of VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.54105/ijvlsid.c1207.031322","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本课题的目标是基于多普勒频移原理,从地面站向空间运动目标装置产生雷达信号源,通过天线、模拟预处理和基于FPGA的频谱分析仪处理接收到的来自目标装置的200MHz高速模拟雷达信号,为空间飞行器测速应用设计一种低成本的频谱监测仪。硬件可重构频谱分析仪设计由ADC(500MSPS)接口块、SRAM (1024x16)内存块、Radix-2 FFT(16位DSP块)和LCD显示(监控)驱动算法组成,实现片上SOC-FPGA系统。该算法可满足空间探测、宽带通信、指挥控制等实时应用的需要。所需的算法在片上可重构硬件SOC-FPGA上实现,同时与通用处理器和嵌入式微控制器相比,保持低成本,低功耗和低面积。采用硬件描述语言VHDL对代码体系结构进行了描述,并使用Xilinx 12.2 ISE Design套件进行了合成和仿真。
Analysis of Velocity Measurement of Radar Signal in Space Vehicle Application using VLSI Chip
The objective of the project is to design a low cost Spectral Monitor for a Space vehicle velocity measurement application, based on Doppler Shift principle by generating an radar signal source from earth station towards moving target device in space and processing received high speed analog 200MHz radar signal from target vehicle device through Antenna, analog pre-processing and FPGA based spectral analyzer. The hardware reconfigurable spectral analyzer design consist of ADC(500MSPS) Interface block, SRAM Memory(1024x16) block, Radix-2 FFT (16 bit DSP block) and LCD Display (Monitoring) driver algorithm implemented On-Chip SOC-FPGA system. The proposed algorithm can be used to meet the need of many real time application such as space exploration, wideband communication, command and control application. The desired algorithm is implemented on-chip reconfigurable hardware SOC-FPGA while keeping the cost, power and area of device low compared to general purpose processor and Embedded based microcontroller. The code architecture is described using hardware description language, VHDL and synthesized and simulated using Xilinx 12.2 ISE Design suite.