{"title":"SAVANT项目","authors":"P. Wilsey, D.E. Martin, H. Hirsch","doi":"10.1109/NAECON.1998.710199","DOIUrl":null,"url":null,"abstract":"The SAVANT project is a joint program between the Air Force, MTL Systems, Inc. and the University of Cincinnati to develop a VHDL analyzer that is freely redistributable for noncommercial use. The goal is to facilitate the insertion of VHDL technology into the government, industrial, and university research and development programs. The analyzer validates the correctness of the input VHDL and builds an intermediate representation in memory for manipulation by backend analysis tools (e.g., behavioral synthesis, fault modeling, and simulation code generators). The intermediate (called AIRE/CE) is well-documented, in review for standardization, and in use by other commercial vendors. The SAVANT technology is freely available in source code form and, under separate programs, the University of Cincinnati is also developing a backend code generator and simulation kernel so that complete front-to-back analysis and simulation activities can be performed with nearly free software.","PeriodicalId":202280,"journal":{"name":"Proceedings of the IEEE 1998 National Aerospace and Electronics Conference. NAECON 1998. Celebrating 50 Years (Cat. No.98CH36185)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"The SAVANT project\",\"authors\":\"P. Wilsey, D.E. Martin, H. Hirsch\",\"doi\":\"10.1109/NAECON.1998.710199\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The SAVANT project is a joint program between the Air Force, MTL Systems, Inc. and the University of Cincinnati to develop a VHDL analyzer that is freely redistributable for noncommercial use. The goal is to facilitate the insertion of VHDL technology into the government, industrial, and university research and development programs. The analyzer validates the correctness of the input VHDL and builds an intermediate representation in memory for manipulation by backend analysis tools (e.g., behavioral synthesis, fault modeling, and simulation code generators). The intermediate (called AIRE/CE) is well-documented, in review for standardization, and in use by other commercial vendors. The SAVANT technology is freely available in source code form and, under separate programs, the University of Cincinnati is also developing a backend code generator and simulation kernel so that complete front-to-back analysis and simulation activities can be performed with nearly free software.\",\"PeriodicalId\":202280,\"journal\":{\"name\":\"Proceedings of the IEEE 1998 National Aerospace and Electronics Conference. NAECON 1998. Celebrating 50 Years (Cat. No.98CH36185)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-07-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 1998 National Aerospace and Electronics Conference. NAECON 1998. Celebrating 50 Years (Cat. No.98CH36185)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NAECON.1998.710199\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 1998 National Aerospace and Electronics Conference. NAECON 1998. Celebrating 50 Years (Cat. No.98CH36185)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.1998.710199","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The SAVANT project is a joint program between the Air Force, MTL Systems, Inc. and the University of Cincinnati to develop a VHDL analyzer that is freely redistributable for noncommercial use. The goal is to facilitate the insertion of VHDL technology into the government, industrial, and university research and development programs. The analyzer validates the correctness of the input VHDL and builds an intermediate representation in memory for manipulation by backend analysis tools (e.g., behavioral synthesis, fault modeling, and simulation code generators). The intermediate (called AIRE/CE) is well-documented, in review for standardization, and in use by other commercial vendors. The SAVANT technology is freely available in source code form and, under separate programs, the University of Cincinnati is also developing a backend code generator and simulation kernel so that complete front-to-back analysis and simulation activities can be performed with nearly free software.