{"title":"使用T触发器的有限状态机状态分配","authors":"G. Rietsche","doi":"10.1109/EURDAC.1993.410667","DOIUrl":null,"url":null,"abstract":"Considerable progress in the area of state assignment for PLA and multi-level finite state machine realizations was made in the last ten years. Although many finite state machines can be more efficiently implemented if T flip-flops are used as memory elements, research has concentrated on finite state machines using D flip-flop memory. A state assignment algorithm for finite state machines using T flip-flops is presented. For realistic benchmarks, the area requirements of the finite state machine realization are up to 50% smaller if T flip-flops are used as memory elements.<<ETX>>","PeriodicalId":339176,"journal":{"name":"Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"State assignment for finite state machines using T flip-flops\",\"authors\":\"G. Rietsche\",\"doi\":\"10.1109/EURDAC.1993.410667\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Considerable progress in the area of state assignment for PLA and multi-level finite state machine realizations was made in the last ten years. Although many finite state machines can be more efficiently implemented if T flip-flops are used as memory elements, research has concentrated on finite state machines using D flip-flop memory. A state assignment algorithm for finite state machines using T flip-flops is presented. For realistic benchmarks, the area requirements of the finite state machine realization are up to 50% smaller if T flip-flops are used as memory elements.<<ETX>>\",\"PeriodicalId\":339176,\"journal\":{\"name\":\"Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-09-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EURDAC.1993.410667\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EURDAC.1993.410667","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
State assignment for finite state machines using T flip-flops
Considerable progress in the area of state assignment for PLA and multi-level finite state machine realizations was made in the last ten years. Although many finite state machines can be more efficiently implemented if T flip-flops are used as memory elements, research has concentrated on finite state machines using D flip-flop memory. A state assignment algorithm for finite state machines using T flip-flops is presented. For realistic benchmarks, the area requirements of the finite state machine realization are up to 50% smaller if T flip-flops are used as memory elements.<>