模拟电路布局的性能约束生成

Proceedings of the Fifteenth National Radio Science Conference. NRSC '98 (Cat. No.98EX109) Pub Date : 1998-02-24 DOI:10.1109/NRSC.1998.711497

I. Mahmoud

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引用次数: 1

摘要

本文提出了一种模拟电路布局约束的生成方法。该方法包括两个阶段:原语识别和约束生成。提出了一种基于分析和知识的混合技术。与基于仿真的方法相比，复杂性分析表明了该方法的有效性。

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Performance constraints generation for analog circuit layout

In this paper, a method for layout constraint generation of analog circuits is presented. The method comprises two phases: primitive recognition and constraint generation. A mixed analytical/knowledge-based technique is proposed. Complexity analysis shows the effectiveness of this method compared with simulation based methods.

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Proceedings of the Fifteenth National Radio Science Conference. NRSC '98 (Cat. No.98EX109)

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