{"title":"在通用路由设备上传输多类流量——对RapidIO/spl交易/互连架构性能的研究","authors":"M. McKenny, J. Dines, D. Harle","doi":"10.1109/ICON.2003.1266164","DOIUrl":null,"url":null,"abstract":"RapidIO/spl trade/ is a pseudo-serial, source-synchronous, point-to-point interconnect which enables reliable, high-speed intra-system communication. The RapidIO physical layer utilises low-voltage differential signaling (LVDS) pairs that interconnect RapidIO link partners belonging to end-points or central switch fabrics. The following is an investigation into the performance of the RapidIO architecture when deployed as the interconnection between the components of a generic switch device. A discrete event simulation model of such a system has been developed enabling various compositions of traffic to be offered to the device. Extensive simulations have enabled a quantitative analysis of various performance metrics that indicate how the device deals with various classes of traffic under saturating and non-saturating aggregate traffic loads. The results therefore provide an insight into the general performance capabilities of the RapidIO architecture as a transport protocol as well as outlining some specific issues regarding implementing RapidIO to interconnect components of a generic switch device.","PeriodicalId":122389,"journal":{"name":"The 11th IEEE International Conference on Networks, 2003. ICON2003.","volume":"222 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Transporting multiple classes of traffic over a generic routing device - an investigation into the performance of the RapidIO/spl trade/ interconnect architecture\",\"authors\":\"M. McKenny, J. Dines, D. Harle\",\"doi\":\"10.1109/ICON.2003.1266164\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"RapidIO/spl trade/ is a pseudo-serial, source-synchronous, point-to-point interconnect which enables reliable, high-speed intra-system communication. The RapidIO physical layer utilises low-voltage differential signaling (LVDS) pairs that interconnect RapidIO link partners belonging to end-points or central switch fabrics. The following is an investigation into the performance of the RapidIO architecture when deployed as the interconnection between the components of a generic switch device. A discrete event simulation model of such a system has been developed enabling various compositions of traffic to be offered to the device. Extensive simulations have enabled a quantitative analysis of various performance metrics that indicate how the device deals with various classes of traffic under saturating and non-saturating aggregate traffic loads. The results therefore provide an insight into the general performance capabilities of the RapidIO architecture as a transport protocol as well as outlining some specific issues regarding implementing RapidIO to interconnect components of a generic switch device.\",\"PeriodicalId\":122389,\"journal\":{\"name\":\"The 11th IEEE International Conference on Networks, 2003. ICON2003.\",\"volume\":\"222 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-09-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 11th IEEE International Conference on Networks, 2003. ICON2003.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICON.2003.1266164\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 11th IEEE International Conference on Networks, 2003. ICON2003.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICON.2003.1266164","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Transporting multiple classes of traffic over a generic routing device - an investigation into the performance of the RapidIO/spl trade/ interconnect architecture
RapidIO/spl trade/ is a pseudo-serial, source-synchronous, point-to-point interconnect which enables reliable, high-speed intra-system communication. The RapidIO physical layer utilises low-voltage differential signaling (LVDS) pairs that interconnect RapidIO link partners belonging to end-points or central switch fabrics. The following is an investigation into the performance of the RapidIO architecture when deployed as the interconnection between the components of a generic switch device. A discrete event simulation model of such a system has been developed enabling various compositions of traffic to be offered to the device. Extensive simulations have enabled a quantitative analysis of various performance metrics that indicate how the device deals with various classes of traffic under saturating and non-saturating aggregate traffic loads. The results therefore provide an insight into the general performance capabilities of the RapidIO architecture as a transport protocol as well as outlining some specific issues regarding implementing RapidIO to interconnect components of a generic switch device.