一种数字信号处理应用的低功耗设计技术

L. Varga, G. Hosszú, F. Kovács
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引用次数: 1

摘要

我们提出了一种新颖的设计技术来降低数据路径的功耗。我们的技术是基于这样一种观察,即电路可以为特定类型的输入进行最佳合成。我们使用逻辑级技术来重新合成数据路径元素,以便在功耗方面有效。数据路径元素的规则性被破坏,但可以应用电压缩放,从而节省电力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A low-power design technique for digital signal processing applications
We present a novel design technique to reduce the power consumption of the data paths. Our technique is based on the observation that a circuit can be optimally synthesized for a particular type of inputs. We use logic-level techniques to re-synthesize data path elements to be effective in terms of power dissipation. The regularity of data path elements are destroyed, however, voltage scaling can be applied, which result in power savings.
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