{"title":"全数字1-D, 2-D和3-D多涡旋混沌作为硬件伪随机数发生器","authors":"A. S. Mansingka, A. Radwan, K. Salama","doi":"10.1109/MWSCAS.2012.6292236","DOIUrl":null,"url":null,"abstract":"This paper introduces the first fully digital implementation of 1-D, 2-D and 3-D multiscroll chaos using the sawtooth nonlinearity in a 3rd order ODE with the Euler approximation. Systems indicate chaotic behaviour through phase space boundedness and positive Lyapunov exponent. Low-significance bits form a PRNG and pass all tests in the NIST SP. 800-22 suite without post-processing. Real-time control of the number of scrolls allows distinct output streams with 2-D and 3-D multiscroll chaos enabling greater controllability. The proposed PRNGs are experimentally verified on a Xilinx Virtex 4 FPGA with logic utilization less than 1.25%, throughput up to 5.25 Gbits/s and up to 512 distinct output streams with low cross-correlation.","PeriodicalId":324891,"journal":{"name":"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Fully digital 1-D, 2-D and 3-D multiscroll chaos as hardware pseudo random number generators\",\"authors\":\"A. S. Mansingka, A. Radwan, K. Salama\",\"doi\":\"10.1109/MWSCAS.2012.6292236\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces the first fully digital implementation of 1-D, 2-D and 3-D multiscroll chaos using the sawtooth nonlinearity in a 3rd order ODE with the Euler approximation. Systems indicate chaotic behaviour through phase space boundedness and positive Lyapunov exponent. Low-significance bits form a PRNG and pass all tests in the NIST SP. 800-22 suite without post-processing. Real-time control of the number of scrolls allows distinct output streams with 2-D and 3-D multiscroll chaos enabling greater controllability. The proposed PRNGs are experimentally verified on a Xilinx Virtex 4 FPGA with logic utilization less than 1.25%, throughput up to 5.25 Gbits/s and up to 512 distinct output streams with low cross-correlation.\",\"PeriodicalId\":324891,\"journal\":{\"name\":\"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2012.6292236\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2012.6292236","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fully digital 1-D, 2-D and 3-D multiscroll chaos as hardware pseudo random number generators
This paper introduces the first fully digital implementation of 1-D, 2-D and 3-D multiscroll chaos using the sawtooth nonlinearity in a 3rd order ODE with the Euler approximation. Systems indicate chaotic behaviour through phase space boundedness and positive Lyapunov exponent. Low-significance bits form a PRNG and pass all tests in the NIST SP. 800-22 suite without post-processing. Real-time control of the number of scrolls allows distinct output streams with 2-D and 3-D multiscroll chaos enabling greater controllability. The proposed PRNGs are experimentally verified on a Xilinx Virtex 4 FPGA with logic utilization less than 1.25%, throughput up to 5.25 Gbits/s and up to 512 distinct output streams with low cross-correlation.