{"title":"参考电压可编程6位差分延迟线ADC,用于数字控制DC-DC开关转换器","authors":"T. Wei, W. Liu, Lifeng Yang","doi":"10.1109/ICICIP.2015.7388169","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a 6-bit, 25 Msps, reference voltage programmable delay-line Analog-to-Digital Converter (ADC), which is aimed to use in the digitally controlled DC-DC switching converters. A new differential bias circuit is used to improve the linearity of delay cells and also the ADC. The reference voltage can be adjusted from 1.8 V to 2.5 V with 0.2 V step, and the input voltage range is limited within ±200mV around the reference voltage. This ADC is implemented in 0.18um CMOS process and works at 3.3 V power supply. The simulation results for this ADC show that, the power dissipation is 450 uW, ENOB is 5.96-bit, DNL and INL is less than ±0.55 LSB and ±0.42 LSB, respectively. The designed ADC has the power-and die area-efficiency, it can be used as the built-in ADC of the digital controller in the digitally controlled DC-DC switching converters.","PeriodicalId":265426,"journal":{"name":"2015 Sixth International Conference on Intelligent Control and Information Processing (ICICIP)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A reference voltage programmable 6-bit differential delay-line ADC for digitally controlled DC-DC switching converters\",\"authors\":\"T. Wei, W. Liu, Lifeng Yang\",\"doi\":\"10.1109/ICICIP.2015.7388169\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of a 6-bit, 25 Msps, reference voltage programmable delay-line Analog-to-Digital Converter (ADC), which is aimed to use in the digitally controlled DC-DC switching converters. A new differential bias circuit is used to improve the linearity of delay cells and also the ADC. The reference voltage can be adjusted from 1.8 V to 2.5 V with 0.2 V step, and the input voltage range is limited within ±200mV around the reference voltage. This ADC is implemented in 0.18um CMOS process and works at 3.3 V power supply. The simulation results for this ADC show that, the power dissipation is 450 uW, ENOB is 5.96-bit, DNL and INL is less than ±0.55 LSB and ±0.42 LSB, respectively. The designed ADC has the power-and die area-efficiency, it can be used as the built-in ADC of the digital controller in the digitally controlled DC-DC switching converters.\",\"PeriodicalId\":265426,\"journal\":{\"name\":\"2015 Sixth International Conference on Intelligent Control and Information Processing (ICICIP)\",\"volume\":\"88 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 Sixth International Conference on Intelligent Control and Information Processing (ICICIP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICIP.2015.7388169\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 Sixth International Conference on Intelligent Control and Information Processing (ICICIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICIP.2015.7388169","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A reference voltage programmable 6-bit differential delay-line ADC for digitally controlled DC-DC switching converters
This paper presents the design of a 6-bit, 25 Msps, reference voltage programmable delay-line Analog-to-Digital Converter (ADC), which is aimed to use in the digitally controlled DC-DC switching converters. A new differential bias circuit is used to improve the linearity of delay cells and also the ADC. The reference voltage can be adjusted from 1.8 V to 2.5 V with 0.2 V step, and the input voltage range is limited within ±200mV around the reference voltage. This ADC is implemented in 0.18um CMOS process and works at 3.3 V power supply. The simulation results for this ADC show that, the power dissipation is 450 uW, ENOB is 5.96-bit, DNL and INL is less than ±0.55 LSB and ±0.42 LSB, respectively. The designed ADC has the power-and die area-efficiency, it can be used as the built-in ADC of the digital controller in the digitally controlled DC-DC switching converters.